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W530H Datasheet

  • W530H

  • Analog IC

  • 8頁

  • ETC

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W530
Frequency Multiplying, Peak Reducing EMI Solution
Features
鈥?Cypress PREMIS鈩?family offering
鈥?Generates an EMI optimized clocking signal at the out-
put
鈥?Selectable output frequency range
鈥?Single 1.25%, 2.5%, 5% or 10% down or center spread
output
鈥?Integrated loop filter components
鈥?Operates with a 3.3 or 5V supply
鈥?Low power CMOS design
鈥?Available in 20-pin SSOP (Small Shrunk Outline
Package)
Key Specifications
Supply Voltages: ......................................... V
DD
= 3.3V鹵0.3V
or V
DD
= 5V鹵10%
Frequency range: ............................13 MHz
鈮?/div>
F
in
鈮?/div>
120 MHz
Cycle to Cycle Jitter: .........................................250 ps (max)
Output duty cycle: ................................. 40/60% (worst case)
Simplified Block Diagram
3.3V or 5.0V
Pin Configuration
[1]
SSOP
X1
XTAL
Input
X2
W530
Spread Spectrum
O u tp u t
(EMI suppressed)
X1
X2
AVDD
MW0^
STOP^
OR1^
NC
GND
OR2*
SSON#^
1
2
3
4
5
6
20
19
18
17
16
15
14
13
12
11
REFOUT
VDD
GND
IR1*
IR2*
SSOUT
MW1*
GND
VDD
MW2^
W530
7
8
9
3.3V or 5.0V
10
Oscillator or
Reference Input
X1
W530
Spread Spectrum
O utpu t
(EMI suppressed)
Note:
1. Pins marked with ^ are internal pull-down resistors
with weak 250
鈩?
Pins marked with * are internal
pull-up resistors with weak 250
鈩?
PREMIS is a trademark of Cypress Semiconductor.
Cypress Semiconductor Corporation
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?/div>
CA 95134
鈥?/div>
408-943-2600
November 22, 2000

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