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W49L401 Datasheet

  • W49L401

  • FLASH

  • 24頁

  • ETC

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W49L401(T)
256K
脳
16 CMOS FLASH MEMORY
1. GENERAL DESCRIPTION
The W49L401(T) is a 4-megabit, 3.3-volt only CMOS flash memory organized as 256K
脳
16 bits. The
device can be programmed and erased in-system with a standard 3.3-volt power supply. A 12-volt V
PP
is not required. The unique cell architecture of the W49L401(T) results in fast program/erase
operations with extremely low current consumption (compared to other comparable 3.3-volt flash
memory products). The device can also be programmed and erased using standard EPROM
programmers.
2. FEATURES
鈥?/div>
Single Voltage operations:
鈭?/div>
3.0
鈭?/div>
3.6V Read/Erase/Program
Fast Program operation:
鈭?/div>
Word-by-Word programming: 30
碌S
(typ.)
Fast Erase operation:
鈭?/div>
Page/Block Erase time: 50 mS (typ.)
鈭?/div>
Chip Erase time: 200 mS (typ.)
鈥?/div>
鈥?/div>
Optional Uniform Page configuration
Low power consumption
鈭?/div>
Active current: 10 mA (typ.)
鈭?/div>
Standby current: 5
碌A(chǔ)
(typ.)
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Automatic program and erase timing with
internal V
PP
generation
End of program or erase detection
鈭?/div>
Toggle bit
鈭?/div>
Data polling
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Fast Read access time: 70 nS
Endurance: 10K cycles (typ.)
Twenty-year data retention
Hardware data protection
Block configuration
鈭?/div>
One 8K-word boot block with lockout
protection
鈭?/div>
Two 4K-word parameter blocks
鈭?/div>
One 16K-word main memory array block
鈭?/div>
Seven 32K-word main memory array blocks
鈭?/div>
128 uniform 2K-word pages
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
RY/#BY open-drain output provides hardware
end-of-write detection
Hardware #RESET pin
Latched address and data
TTL compatible I/O
JEDEC standard word-wide pinouts
Available packages: 44-pin SOP, 48-pin TSOP
-1-
Publication Release Date: August 16, 2002
Revision A4

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