W39L040A Data Sheet
512K
脳
8 CMOS FLASH MEMORY
Table of Contents-
1.
2.
3.
4.
5.
6.
GENERAL DESCRIPTION ......................................................................................................... 3
FEATURES ................................................................................................................................. 3
PIN CONFIGURATIONS ............................................................................................................ 4
BLOCK DIAGRAM ...................................................................................................................... 4
PIN DESCRIPTION..................................................................................................................... 4
FUNCTIONAL DESCRIPTION ................................................................................................... 5
6.1
Device Bus Operation..................................................................................................... 5
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
Read Mode.......................................................................................................................5
Write Mode .......................................................................................................................5
Standby Mode ..................................................................................................................5
Output Disable Mode........................................................................................................5
Auto-select Mode..............................................................................................................5
6.2
Data Protection ............................................................................................................... 6
6.2.1
6.2.2
6.2.3
6.2.4
Low VDD Inhibit................................................................................................................6
Write Pulse "Glitch" Protection .........................................................................................6
Logical Inhibit ...................................................................................................................6
Power-up Write and Read Inhibit......................................................................................6
6.3
Command Definitions ..................................................................................................... 6
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
Read Command ...............................................................................................................6
Auto-select Command ......................................................................................................7
Byte Program Command ..................................................................................................7
Chip Erase Command ......................................................................................................7
Sector Erase Command ...................................................................................................8
6.4
Write Operation Status ................................................................................................... 8
6.4.1
6.4.2
DQ7: #Data Polling...........................................................................................................8
DQ6: Toggle Bit................................................................................................................9
6.5
Table of Operating Modes .............................................................................................. 9
6.5.1
6.5.2
6.5.3
6.5.4
Device Bus Operations.....................................................................................................9
Auto-select Codes (High Voltage Method) .......................................................................9
Sector Address Table .....................................................................................................10
Command Definitions .....................................................................................................10
6.6
6.7
Embedded Programming Algorithm ............................................................................. 11
Embedded Erase Algorithm.......................................................................................... 12
Publication Release Date:April 14, 2005
Revision A3
-1-