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W27C01P-70 Datasheet

  • W27C01P-70

  • EEPROM|128KX8|CMOS|LDCC|32PIN|PLASTIC

  • 185.43KB

  • 15頁

  • ETC

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W27C01
128K
脳
8 ELECTRICALLY ERASABLE EPROM
GENERAL DESCRIPTION
The W27C01 is a high speed, low power consumption Electrically Erasable and Programmable Read
Only Memory organized as 131,072 x 8 bits. It requires only one supply in the range of 5.0V
鹵5%
in
normal read mode. The W27C01 provides an electrical chip erase function.
FEATURES
Single power supply voltage:
5.0V
鹵5%
鈥?/div>
High speed access time: 70 nS (max.)
鈥?/div>
Read operating current: 30 mA (max.)
鈥?/div>
Erase/Programming operating current:
30 mA (max.)
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Standby current: 20
碌A(chǔ)
(max.)
+12V erase/programming voltage
Fully static operation
All inputs and outputs directly TTL/CMOS
compatible
Three-state outputs
Available packages: 32-pin 600 mil DIP,
32-lead PLCC and 32-lead STSOP
PIN CONFIGURATIONS
BLOCK DIAGRAM
V
DD
Vss
V
PP
Vpp
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32-pin
PDIP
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
DD
#PGM
NC
A14
A13
A8
A9
A11
#OE
A10
#CE
Q7
Q6
Q5
Q4
Q3
A7
A6
A5
A4
A3
A2
A1
A0
Q0
4
5
6
7
8
9
10
11
12 1
13 4
3 2
1
A A A
1 1 1
2 5 6
V
p
p
#
V P
D G N
D M C
3
2
3
1
3
0 29
28
27
26
25
24
23
2 22
0 21
#PGM
#CE
#OE
A14
A13
A8
A9
A11
#OE
A10
#CE
Q7
CONTROL
OUTPUT
BUFFER
Q0
.
.
Q7
32-lead PLCC
A0
.
.
A16
DECODER
CORE
ARRAY
1
5
1
6
1 1
7 8
1
9
Q Q V Q Q Q Q
1 2 s 3 4 5 6
s
PIN DESCRIPTION
A11
A9
A8
A13
A14
NC
#PGM
V
DD
V
PP
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
32-lead STSOP
26
25
24
23
22
21
20
19
18
17
#OE
A10
#CE
Q7
Q6
Q5
Q4
Q3
V SS
Q2
Q1
Q0
A0
A1
A2
A3
SYMBOL
A0
鈭?/div>
A16
Q0
鈭?/div>
Q7
#CE
#OE
#PGM
V
PP
V
DD
V
ss
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable
Output Enable
Program Enable
Program/Erase Supply Voltage
Power Supply
Ground
No Connection
-1-
Publication Release Date: April 15, 2002
Revision A2

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