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W254B Datasheet

  • W254B

  • Clocks and Buffers

  • 17頁

  • ETC

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W254B
133-MHz Spread Spectrum FTG for
Mobile Pentium廬 III Platforms
Features
鈥?Maximized EMI suppression using Cypress鈥檚 Spread
Spectrum technology (鈥?.5% and 鹵0.5%)
鈥?Single chip system FTG for Mobile Intel
廬
Platforms
鈥?Two CPU outputs
鈥?Seven copies of PCI clock (one Free Running)
鈥?Seven SDRAM clock (one DCLK for Memory Hub)
鈥?Two copies of 48-MHz clock (non-spread spectrum) op-
timized for USB reference input and video DOT clock
鈥?Three 3V66 Hublink/AGP outputs
鈥?One VCH clock (48-MHz non-SSC or 66.67-MHz SSC)
鈥?One APIC outputs
鈥?One buffered reference output
鈥?Supports frequencies up to 133 MHz
鈥?SMBus interface for programming
鈥?Power management control inputs
APIC, 48-MHz, 3V66, PCI Outputs
Cycle-to-Cycle Jitter: ...................................................500 ps
CPU Output Skew: ......................................................150 ps
3V66 Output Skew: .....................................................175 ps
APIC, SDRAM Output Skew: ......................................250 ps
PCI Output Skew:........................................................500 ps
VDDQ3 (REF, PCI, 3V66, 48 MHz, SDRAM): ......... 3.3V鹵5%
VDDQ2 (CPU, APIC):....... 2.5V鹵5%in Selectable Frequency
Table 1. Pin Selectable Frequency
Input
Address
FS1 FS0
0
0
0
1
1
0
1
1
Output Frequencies
SDRAM 48MHz PCI APIC REF 3V66
100
48
33
14.318 66
100
MHz
MHz
MHz MHz
133
100
Key Specifications
CPU, SDRAM Outputs Cycle-to-Cycle Jitter:.............. 250 ps
CPU
66
100
133
133
Block Diagram
X1
X2
Pin Configuration
PLL Ref Freq
VDD_REF
REF
XTAL
OSC
PLL 1
Divider
Network
Stop
Clock
Control
VDD_CPU
CPU
CPU_F
CPU_STP#
VDD_APIC
APIC
VDD_SDRAM
DCLK
SDRAM0:5
VDD_PCI
PCI_F/FS0
PWR_DWN#
Stop
Clock
Control
PCI1/FS1
PCI2:6
PCI_STP#
VDD_3V66
3V66_0:1
3V66_AGP
VDD_48
PLL2
USB (48MHz)
DOT (48MHz)
VDD_REF
X1
X2
GND_REF
GND_PCI
PCI_F/FS0^
PCI1/FS1^
PCI2
VDD_PCI
PCI3
PCI4
PCI5
PCI6
VDD_3V66
3V66_0
3V66_1
3V66_AGP
GND_3V66
VCH_CLK
GND_48
USB
DOT
VDD_48
GND_CORE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
REF
APIC
VDD_APIC
VDD_CPU
CPU
CPU_F
GND_CPU
GND_SDRAM
SDRAM0
SDRAM1
VDD_SDRAM
SDRAM2
SDRAM3
GND_SDRAM
SDRAM4
SDRAM5
DCLK
VDD_SDRAM
CPU_STP#
PCI_STP#
PWR_DWN#
SCLK
SDATA
VDD_CORE
SDATA
SCLK
SMBus
Logic
VCH_CLK
Note:
1. Internal pull-down or pull-up resistors present on inputs
marked with * or ^ respectively. Design should not rely solely
on internal pull-up or pull-down resistor to set I/O pins HIGH
or LOW respectively.
W254B
Intel and Pentium are registered trademarks of Intel Corporation.
Cypress Semiconductor Corporation
Document #: 38-07233 Rev. *A
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?/div>
CA 95134 鈥?408-943-2600
Revised December 22, 2002

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  • 英文版
    Clocks and Buffers
    ETC
  • 英文版
    133MHz Spread Spectrum FTG for Mobile Pentium㈢ III Platform...
    SPECTRALINEAR
  • 英文版
    133-MHz Spread Spectrum FTG for Mobile Pentium㈢ III Platfor...
    CYPRESS
  • 英文版
    133MHz Spread Spectrum FTG for Mobile Pentium㈢ III Platform...
    SPECTRALINEAR&n...

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