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W196 Datasheet

  • W196

  • Spread Spectrum FTG for 440BX and VIA Apollo Pro-133

  • 11頁

  • CYPRESS

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PRELIMINARY
W196
Spread Spectrum FTG for 440BX and VIA Apollo Pro-133
Features
鈥?Maximized EMI suppression using Cypress鈥檚 Spread
Spectrum Technology
鈥?System frequency synthesizer for 440BX, 440ZX, and
VIA Apollo Pro-133
鈥?I
2
C programmable to 155 MHz (32 selectable
frequencies)
鈥?Two skew-controlled copies of CPU output
鈥?Seven copies of PCI output (synchronous w/CPU out-
put)
鈥?One copy of 14.31818-MHz IOAPIC output
鈥?One copy of 48-MHz USB output
鈥?Selectable 24-/48-MHz clock is determined by resistor
straps on power up
鈥?One high-drive output buffer that produces a copy of
the 14.318-MHz reference
鈥?Isolated core VDD pin for noise reduction
CPU Cycle to Cycle Jitter: .......................................... 250 ps
CPU, PCI Output Edge Rate:
......................................... 鈮?
V/ns
CPU0:1 Output Skew: ................................................ 175 ps
PCI_F, PCI1:6 Output Skew: .......................................500 ps
CPU to PCI Skew: ........................ 1.5 to 4.0 ns (CPU Leads)
REF2X/SEL48#, SCLOCK, SDATA: ............... 250-k鈩?pull-up
FS1: ............................................................250-k鈩?pull-down
FS0: ...................................................No pull-up or pull-down
Note:
Internal pull-up or pull-down resistors should not be re-
lied upon for setting I/O pins HIGH or LOW.
Table 1. Pin Selectable Frequency
FS1
1
1
0
0
FS0
1
0
1
0
CPU(0:1)
133.3 MHz
105 MHz
100 MHz
66.8 MHz
PCI
33.3 MHz
35 MHz
33.3 MHz
33.3 MHz
Key Specifications
Supply Voltages: ....................................... V
DDQ3
= 3.3V鹵5%
V
DDQ2
= 2.5V鹵5%
Block Diagram
VDDQ3
REF2X/SEL48#
GND
X1
X2
XTAL
OSC
PLL Ref Freq
VDDQ3
IOAPIC
Pin Configuration
VDDQ2
CPU0
CPU1
GND
FS1
FS0
PLL 1
梅2/梅3
VDDQ3
PCI_F
PCI1
PCI2
PCI3
PCI4
X1
X2
GND
PCI_F
PCI1
PCI2
PCI3
PCI4
VDDQ3
PCI5
PCI6
VDDQ3
48MHz
24_48MHz/FS1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GND
REF2X/SEL48#
VDDQ3
VDDQ2
IOAPIC
VDDQ2
CPU0
CPU1
VDDQ3
GND
SDATA
SCLOCK
FS0
GND
SDATA
SCLOCK
I
2
C
LOGIC
PCI5
PCI6
GND
VDDQ3
PLL2
48MHz
24_48MHz/FS1
GND
Cypress Semiconductor Corporation
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?/div>
CA 95134 鈥?/div>
408-943-2600
October 28, 1999, rev. **

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  • 英文版
    Spread Spectrum FTG for 440BX and VIA Apollo Pro-133
    CYPRESS
  • 英文版
    Spread Spectrum FTG for 440BX and VIA Apollo Pro-133
    CYPRESS [C...
  • 英文版
    Spread Spectrum FTG for 440BX and VIA Apollo Pro-133
    CYPRESS [C...

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