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28 MHz
Cycle to Cycle Jitter: ....................................... 300 ps (max.)
Selectable Spread Percentage: ....................1.25% or 3.75%
Output Duty Cycle: ............................... 40/60% (worst case)
Output Rise and Fall Time: .................................. 5 ns (max.)
Simplified Block Diagram
3.3V or 5.0V
Pin Configurations
SOIC
W180-01/51
CLKIN or X1
NC or X2
GND
SS%
1
2
3
4
8
7
6
5
FS2
FS1
VDD
CLKOUT
X1
XTAL
Input
X2
W180
Spread Spectrum
Output
(EMI suppressed)
W180-02/03
W180-52/53
CLKIN or X1
NC or X2
GND
SS%
1
2
3
4
8
7
6
5
SSON#
FS1
VDD
CLKOUT
3.3V or 5.0V
Oscillator or
Reference Input
W180
Spread Spectrum
Output
(EMI suppressed)
PREMIS is a trademark of Cypress Semiconductor Corporation.
Cypress Semiconductor Corporation
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3901 North First Street
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San Jose
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CA 95134
鈥?/div>
408-943-2600
July 21, 2000, rev. *A
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