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VSC9182 Datasheet

  • VSC9182

  • VSC9182 - 40G STS-1 Time Slot Interchange

  • 111.78KB

  • 2頁

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PHYSICAL LAYER PRODUCT
TIMESTREAM廬 PRODUCT FAMILY
VSC9182
VSC9182 - 40G STS-1 Time Slot Interchange
Output Backplane Interface
!Serial
622.08 Mb/s Differential LVDS STS-12/STM-4 Outputs
!Optionally
Inserts Byte-interleaved Parity into B1 Byte of
Following Frame
!Optionally
Scrambles Outgoing SONET Data
!Optionally
Inserts AIS or Unequipped on a Per-channel, Per-
time-slot Basis
CPU Interface
!Generic
Microprocessor (CPU) Interface used for Device
Configuration and Status Checking
F E AT U R E S :
!10-bit
Data Bus and 11-bit Address Bus
Interconnection Matrix
!Time
& Space Switches any STS-(n) [n= 1, 3c, 12c] Signal of an
Incoming STS-12 into any Byte Position of any STS-12 Output
!Single
Stage Non-blocking Structure of the Switch Allows for
Multicast and Full Broadcast
!Hitless
Switching: Programming is Queued and Takes Effect
After user Intervention During the Next Frame Boundary
!Unequipped
or AIS Signals can be Substituted into any of the
Outgoing STS-1 Timeslots.
!Provides
a Capability to Read out the Switch Configuration
(address map)
Input Backplane Interface
!Serial
622.08 Mb/s Differential LVDS STS-12/STM-4 Inputs
!Receives
64 Serial 622.08 Mb/s STS-12/STM-4 Signals
!Input
Signals are Presumed Frequency Synchronous and Frame
aligned to Within +/- 3 Time Slots of the System SYNC Input
!Provides
On-chip Data Recovery De-skewing Functionality to
Bit-align, Byte-align and Frame-align all Incoming STS-12s
(Within the above Tolerance) to the Local Clock
!Flags
Out-of-frame (OOF), Loss-of-signal (LOS) and Parity Errors
!Checks
B1 Parity of Incoming Data
!Inserts
Unequipped or AIS When Channel is in OOF, LOS or
Unprovisioned State and Inhibits Alarms
!Optionally
De-scrambles Incoming SONET Data
T1/E1/DS-3 Term
DS-0/DS-1/DS-3
HDLC & M13
2.5Gb/s
VSC9187/88
VT/TU Switch
2.5Gb/s
!Interrupt
Output Pin to Signal Status Changes of Internal Alarms
Test Interface
!IEEE
P1149.1 Test Access Port Controls External Boundary Scan
TIMESTREAM DIAGRAM:
4 x OC-48
1 x OC-192
VSC9186 10Gb/s 2.5Gb/s
Pointer Processor
PHY's & Analog
Ethernet
PHY, MAC,
Packet
碌P
CSIX
2.5Gb/s
SONET/SDH Framer
(STS3c) - STS48c)
Packet/Cell
碌P
CSIX
2.5Gb/s
SONET/SDH Framer
(STS48c - STS-768c)
Packet/Cell
碌P
CSIX
CSIX
DS-3
T1/E1
PB-VSC9182-001
Layer 2/3/4 Packet/Cell Switch Fabric
VSC9182/VSC9185 40G/160GTSI

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