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VSC7130RC Datasheet

  • VSC7130RC

  • Telecomm/Datacomm

  • 186.56KB

  • 22頁

  • ETC

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VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
VSC7130
Features
鈥?Used in Switches, Hubs, GBICs, MIAs and JBODs
鈥?ANSI T11 Fibre Channel Compliant at 1.0625Gb/s
鈥?IEEE 802.3z Gigabit Ethernet Compliant at 1.25Gb/s
鈥?Dual Clock and Data Recovery Units Configurable as
Repeaters or Retimers
鈥?Two-Wire Serial Communications Port for Control
and Status
鈥?Combined Analog/Digital Signal Detect Units
Dual Repeater/Retimer
for Fibre Channel and Gigabit Ethernet
鈥?1/10
th
or 1/20
th
Baud Rate TTL/PECL Ref-
erence Clock Input and PECL Output
鈥?Bidirectional Analog/Digital Signal Detect
鈥?3.3V, 850mW Power Typical
鈥?64-pin, 10x10x1.0mm TQFP Package
鈥?Cost Effective 0.35
碌
m CMOS Technology
General Description
The VSC7130 is used in Fibre Channel (1.0625Gb/s) and Gigabit Ethernet (1.25Gb/s) systems to provide
bidirectional Clock and Data Recovery (CDR) to ensure standards compliance at critical systems interfaces. As
protocol ASICs integrate multiple SerDes functions, the ASICs tend to be located far from interface connectors
which results in signal degradation and difficulty in meeting industry-standard signal quality specifications. The
VSC7130 provides a low-cost, easy-to-use solution to this problem by ensuring standards-compliant signal
quality at system interfaces. Additional circuitry implements an FC-AL Hub node.
The VSC7130 provides a pair of bidirectional CDRs which can be configured as either repeaters or retimers
or bypassed altogether. Internal system data is recovered and retransmitted with standards-compliant signal
quality at the connector. External receive data from the connector is recovered and retransmitted to the internal
system with increased amplitude and attenuated jitter. An optional Two-Wire Interface allows robust configura-
tion control and status monitoring of the device in order to enhance operation.
VSC7130 Block Diagram
MUX1SEL
SI+
SI-
T/R
TXDIS
1
0
SO+
SO-
BYP
1
0
MUX3
MUX5
SDU0
MUX4SEL
0
MUX1
1
CDR0
0
MUX4
1
TX+
TX-
R1/0
MUX2SEL
MUX5SEL
1
0
MUX2
1
CDR1
0
SDU1
53.125 or106.25MHz
RX0+
RX0-
RX1+
RX1-
SDET
REFO+
REFO-
REFI+
REFI-
HALF/FULL
CMU
x10/x20
CAP0
1.0625 GHz
NOT SHOWN: Two-Wire Interface, test, modes and RXBIAS
Clock Frequencies shown for Fibre Channel
CAP1
G52297-0, Rev 4.0
04/02/01
漏
VITESSE
SEMICONDUCTOR CORPORATION
鈥?741 Calle Plano 鈥?Camarillo, CA 93012
Tel: (800) VITESSE 鈥?FAX: (805) 987-5896 鈥?Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 1

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