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VSC7126 Datasheet

  • VSC7126

  • 1.0625 Gbits/sec Fibre Channel Transceiver

  • 16頁(yè)

  • VITESSE

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VITESSE
SEMICONDUCTOR CORPORATION
Datasheet
VSC7126
Features
鈥?ANSI X3T11 Fibre Channel Compatible 1.0625
Gbps Full-duplex Transceiver
鈥?GLM Compatible (FCSI-301-Rev 1.0)
鈥?20 Bit TTL Interface For Transmit And Receive Data
鈥?Monolithic Clock Synthesis And Clock Recovery -
No External Components
鈥?53.125 MHz TTL Reference Clock
1.0625 Gbits/sec Fibre
Channel Transceiver
鈥?Automatic Lock-to-Reference Function
鈥?Suitable For Both Copper And Fiber
Optical Link Applications
鈥?Low Power Operation - 850 mW
鈥?80 Pin, 14x14 mm PQFP
鈥?Single +3.3V Power Supply
General Description
The VSC7126 is a full-speed Fibre Channel Transceiver optimized for Host Adapter and other space- con-
strained applications. It accepts two 10-bit 8B/10B encoded transmit characters, latches them on the rising edge
of TBC and serializes the data onto the TX+/- PECL differential outputs at a baud rate which is twenty times the
TBC frequency. It also samples serial receive data on the RX+/- PECL differential inputs, recovers the clock
and data, deserializes it onto two 10-bit receive characters, outputs a recovered clocks at one twentieth of the
incoming baud rate and detects Fibre Channel 鈥淐omma鈥?characters. The VSC7126 contains on-chip PLL cir-
cuitry for synthesis of the baud-rate transmit clock, and extraction of the clock from the received serial stream.
These circuits are fully monolithic and require no external components.
VSC7126 Block Diagram
EWRAP
20
R0:19
QD
Serial to
Parallel
Retimed
Data
Recovered
Clock
QD
Clock
Recovery
2:1
RX+
RX-
RBC(0)
RBC(1)
L_UNUSE
COM_DET
EN_CDET
53.125 MHz
梅
20
Comma
Detect
Frame
Logic
20
T0:19
DQ
Parallel
to Serial
Serial Data
Synthesized
Clock
DQ
TX+
TX-
53.125 MHz
TBC
TXEN#
PLL Clock
Multiply (x20)
G52148-0, Rev. 4.3
3/4/99
漏
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 鈥?805/388-3700 鈥?FAX: 805/987-5896
Page 1

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