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VITESSE

SEMICONDUCTOR CORPORATION

Data Sheet

VSC6048

Features

鈥?8 Fully Integrated Timing Generators for ATE

Applications

鈥?10/5ns Delay Range, 10ps Resolution

鈥?Fully Digital Interface. No Off-Chip DACs or

Trim Components Required

鈥?鹵 4 LSB Differential Non-Linearity

High-Speed Octal

Programmable Timing Generator

鈥?100MHz/200MHz Dynamic Reprogram Frequency

for Incrementing and Decrementing

鈥?Internal or External High-Speed Clock Option

鈥?Low Power: 8 Watts, max

鈥?Low Cost 160-Pin PQFP Packaging

VSC6048 Block Diagram

CAL_DAT

6

Register

6

SPAN

CAL

DAC

DAC_WR

IN0A

Input

Interleve

IN0B

Variable

Shift

Register

Vernier

Delay

Element

Out 0

400MHz

Clock

800MHz

Clock

3

7

Register

Register

TEST[0:9]

10

Channel 0

Channel 1

Channel 2

7

Channel 7

DIN

ADR[0:2]

DCLK

SHIFT

RCK

RCKN

BYP

FSEL

PLLRST

PLL

Clock Multiplier

Unit

x8, x16

400MHz Clock

Calibration

Register

6

CAL_DAT

800MHz Clock

G52335-0, Rev. 4.0

8/28/00

漏

VITESSE

SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 鈥?805/388-3700 鈥?FAX: 805/987-5896

Page 1

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