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VNS3NV04D Datasheet

  • VNS3NV04D

  • “OMNIFET II”: FULLY AUTOPROTECTED POWER MOSFET

  • 14頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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VNS3NV04D
鈥淥MNIFET II鈥?
FULLY AUTOPROTECTED POWER MOSFET
TYPE
VNS3NV04D
(*)Per each device
R
DS(on)
120 m鈩?(*)
I
lim
3.5 A (*)
V
clamp
40 V (*)
n
LINEAR CURRENT LIMITATION
n
THERMAL SHUT DOWN
n
SHORT CIRCUIT PROTECTION
n
INTEGRATED CLAMP
n
LOW CURRENT DRAWN FROM INPUT PIN
n
DIAGNOSTIC FEEDBACK THROUGH INPUT
PIN
n
ESD PROTECTION
n
DIRECT ACCESS TO THE GATE OF THE
POWER MOSFET (ANALOG DRIVING)
n
COMPATIBLE WITH STANDARD POWER
MOSFET
SO-8
DESCRIPTION
The VNS3NV04D is a device formed by two
monolithic OMNIFET II chips housed in a
standard SO-8 package. The OMNIFET II are
designed in STMicroelectronics VIPower M0-3
Technology: they are intended for replacement of
standard Power MOSFETS from DC up to 50KHz
BLOCK DIAGRAM
applications. Built in thermal shutdown, linear
current limitation and overvoltage clamp protects
the chip in harsh environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
DRAIN1
DRAIN2
OVERVOLTAGE
CLAMP
INPUT1
GATE
CONTROL
OVERVOLTAGE
CLAMP
GATE
CONTROL
INPUT2
OVER
TEMPERATURE
LINEAR
CURRENT
LIMITER
LINEAR
CURRENT
LIMITER
OVER
TEMPERATURE
SOURCE1
SOURCE2
February 2003
1/14
1

VNS3NV04D 產(chǎn)品屬性

  • VNS3NV04D View All Specifications

  • 100

  • 集成電路 (IC)

  • PMIC - MOSFET,電橋驅(qū)動(dòng)器 - 內(nèi)部開關(guān)

  • OMNIFET II™, VIPower™

  • 低端

  • 非反相

  • 2

  • 120 毫歐

  • 3.5A

  • 5A

  • -

  • -40°C ~ 150°C

  • 表面貼裝

  • 8-SOIC(0.154",3.90mm 寬)

  • 8-SO

  • 管件

  • 497-2668-5497-2668-5-ND497-3318-5

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