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VNS3NV04D-E Datasheet

  • VNS3NV04D-E

  • OMNIFET II fully autoprotected Power MOSFET

  • 21頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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VNS3NV04D-E
OMNIFET II
fully autoprotected Power MOSFET
Features
Max On-State resistance (per ch.)
Current limitation (typ)
Drain-Source clamp voltage
R
ON
I
LIMH
V
CLAMP
120m鈩?/div>
3.5A
40V
SO-8
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
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Linear current limitation
Thermal shut down
Short circuit protection
Integrated clamp
Low current drawn from input pin
Diagnostic feedback through input pin
Esd protection
Direct access to the gate of the power mosfet
(analog driving)
Compatible with standard power mosfet
Description
The VNS3NV04D-E is a device formed by two
monolithic OMNIFET II chips housed in a
standard SO-8 package. The OMNIFET II are
designed in STMicroelectronics VIPower M0-3
Technology: they are intended for replacement of
standard Power MOSFETs from DC up to 50KHz
applications. Built in thermal shutdown, linear
current limitation and overvoltage clamp protects
the chip in harsh environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
Table 1.
Device summary
Order codes
Package
Tube
SO-8
VNS3NV04D-E
Tape and Reel
VNS3NV04DTR-E
July 2007
Rev 2
1/21
www.st.com
21

VNS3NV04D-E 產(chǎn)品屬性

  • VNS3NV04D-E View All Specifications

  • 100

  • 集成電路 (IC)

  • PMIC - MOSFET，電橋驅(qū)動器 - 內(nèi)部開關(guān)

  • OMNIFET II™, VIPower™

  • 低端

  • 非反相

  • 2

  • 120 毫歐

  • 3.5A

  • 5A

  • -

  • -40°C ~ 150°C

  • 表面貼裝

  • 8-SOIC（0.154"，3.90mm 寬）

  • 8-SO

  • 管件

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