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VES1993 Datasheet

  • VES1993

  • SINGLE CHIP SATELLITE CHANNEL RECEIVER

  • 15頁(yè)

  • PHILIPS

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VES 1993
SINGLE CHIP
SATELLITE
CHANNEL RECEIVER
FEATURES
鈥?/div>
DSS and DVB-S compatible single chip
demodulator & forward error correction.
鈥?/div>
Dual 6-bit ADC on chip.
鈥?/div>
PLL for crystal frequency multiplication.
鈥?/div>
Variable rate BPSK/QPSK coherent
demodulator.
鈥?/div>
Modulation rate from 1 to 45MBaud.
鈥?/div>
Automatic Gain Control output.
鈥?/div>
Digital symbol timing recovery :
Acquisition range up to
鹵240ppm
鈥?/div>
Digital carrier recovery :
Acquisition range up to
鹵12%
of symbol rate
鈥?/div>
Half Nyquist baseband filters on chip
roll-off = 0.35 for DVB and 0.2 for DSS
鈥?/div>
Channel quality estimation.
鈥?/div>
Viterbi decoder :
Supported rates : from 1/2 to 8/9.
Constraint length K = 7
with G1 = 171
8
G2 = 133
8
VBER measurement provided.
鈥?/div>
Convolutional deinterleaver and Reed
Solomon decoder according to DVB and
DSS specifications.
鈥?/div>
Automatic Frame Synchronization.
鈥?/div>
Selectable DVB-S descrambling.
鈥?/div>
I2C bus interface.
鈥?/div>
100-pin MQFP package.
鈥?/div>
CMOS technology (0.35
碌m
3.3V).
APPLICATIONS
鈥?/div>
DSS receivers.
鈥?/div>
DVB-S receivers (ETS 300-421).
鈥?/div>
Direct Broadcast Satellite (DBS).
DESCRIPTION
The VES 1993 is a single-chip channel receiver for satellite television
reception which matches both DSS and DVB-S standards. The
device contains a dual 6-bit flash analog to digital converter, variable
rate BPSK/QPSK coherent demodulator and Forward Error
Correction functions.The ADCs directly interface with I and Q analog
baseband signals. After A to D conversion, the VES 1993 implements
a bank of cascadable filters as well as antialias and half-Nyquist
filters. Analog AGC signal is generated by an amplitude estimation
function. The VES 1993 performs clock recovery at twice the Baud
rate and achieves coherent demodulation without any feedback to
the local oscillator. Forward Error Correction is built around two error
correcting codes : a Reed-Solomon (outer code), and a Viterbi
decoder (inner code). The Reed-Solomon decoder corrects up to 8
erroneous bytes among the N bytes of one data packet.
Convolutional deinterleaver is located between the Viterbi output and
the R.S. decoder input. De-interleaver and R.S. decoder are
automatically synchronized thanks to the frame synchronisation
algorithm which uses the sync pattern present in each packet. The
VES 1993 is controlled via an I2C bus interface. The circuit operates
up to 91MHz and can process variable modulation rates, up to
45Mbaud.
The VES 1993 provides an interrupt line which can be programmed
on either events or timing information.
Designed in 0.35 CMOS technology and housed in a 100-MQFP
package, the VES 1993 operates over the commercial temperature
range.
comatlas S.A.,
30 rue du Ch錨ne Germain, BP 814, 35518 CESSON-SEVIGNE Cedex, FRANCE
Phone : +33 (0)2 99 27 55 55, Fax : +33 (0)2 99 27 55 27, Internet : www.comatlas.fr / VES 1993 rev 2.0 / Jan 99

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