VCB1 Half Size DIP
Featuring
3.0 or 5.0 Vdc Option
Low Cost
1 to 160 MHz
Enable Disable Option
TTL/CMOS Compatible
Frequency Range
32.768 KHz to 160 MHz
80 to 160 MHz uses a low jitter internal (<50 ps) multiplier IC which
will also affect phase noise performance.
Standard
Frequencies
Package Options
Voltage Options/
Load Drive
See
Standard Frequency Table
B1
= 0.5" x 0.5" x 0.2" Half Size DIP
A
= +5.0 Vdc
B
= +3.3 Vdc
C
= +3.0 Vdc
E
= +5.0 Vdc
F
= +3.3 Vdc
鹵10%
鹵10%
鹵5%
鹵10%
鹵5%
15pF
15pF
15pF
50pF
50pF
Electrical Options
0
= No Tristate
60/40 Symmetry
1
= Tristate
60/40 Symmetry
2
= No Tristate
55/45 Symmetry
55/45 Symmetry
3
= Tristate
5
= Enable Option 60/40 Symmetry
6
= Enable Option 55/45 Symmetry
Logic 1 = Enable
Logic 0 = Disable
A
= 鹵100 PPM 0擄C to +70擄C
B
= 鹵50 PPM
0擄C to +70擄C
C
= 鹵100 PPM -40擄C to +85擄C
D
= 鹵50 PPM -40擄C to +85擄C
0擄C to +70擄C
E
= 鹵25 PPM
F
= 鹵25 PPM -40擄C to +85擄C
G
= 鹵20 PPM
0擄C to +70擄C
10 ms Maximum
<5.0 PPM/year at +40擄C dynamic
HCMOS/TTL
50 mA Maximum
Anti Static Tubes
Enable/Disable
Stability Options
Start-Up
Aging
Load
Current
Standard
Packaging
1
2
