鈩?/div>
worst-case value internal power device
Motor inductance sense mode for determination of
motor start position
Microprocessor controlled ramp-to-start speed in
start mode
Sinusoidal current mode or 6-state commutation in
run mode
Programmable wave shape for optimized acoustic
performance
Transconductance configuration in run mode,
using PWM for efficiency
Peak current limit control in start mode, using con-
stant off-time method
10-bit DAC with 4-step gain ranging
Fast restart from partial spindown, using phase fre-
quency comparison of BEMF
I
I
I
I
Pin Information
TESTEN
50
GNDA1
VCK12
SVRIB
SVRIA
VMAG
CVCO
SGND
UDAC
SVRS
VCK5
LVRS
LVRB
RSM
RC
V5
49
48
47
46
45
44
43
42
41
I
64
63
62
61
60
59
58
57
56
55
54
53
52
GNDSW
CP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
51
I
NRG
GNDVCMP
GNDVCMP
VCMA
VCMB
VMVCMP
VMVCMP
V12VCM
UMA
GNDA2
RSU
UCMAS
SHOCK
RBIAS
AUX2
AUX1
I
PUMP
RSM2
PW
I
I
VMSP2
V12SP2
VMSP2
PV
RSM1
VC2100
40
39
38
37
36
35
34
33
Serial Port Interface
I
I
PU
VMSP1
V12SP1
30 MHz read/write serial port
3.3 V TTL compatible digital I/O, 5 V CMOS input
tolerant
SVRG
PRG
SPC
SEQ
GNDD
DMUX
NREG
PREG
SPD
SOC
ADC
SPE
ACLK
AMUX
PORZ
RETZ
Voltage Monitor, System Reset, and
Auxiliary Supplies
I
GNDREF
VREF
PRI
2719 (F)
Figure 1. VC2100 Pin Diagram (64-Pin eTQFP)
5 V, 12 V, and 3.3 V undervoltage fault compara-
tors
1
2
