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V62C1804096 Datasheet

  • V62C1804096

  • 512K X 8, CMOS STATIC RAM

  • 150.31KB

  • 10頁(yè)

  • MOSEL

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V62C1804096
512K X 8, CMOS STATIC RAM
PRELIMINARY
s
s
s
s
s
s
s
s
Row Decoder
1024
x
4096
Sense Amp
CILETIV LESOM
Features
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
Description
The V62C1804096 is a very low power CMOS
static RAM organized as 524,288 words by 8 bits.
Easy memory expansion is provided by an active
LOW CE1, and active HIGH CE2, an active LOW
OE, and three static I/O鈥檚. This device has an
a u to m a tic p o w e r -d o w n mo d e f e a tu r e w h e n
deselected.
High-speed: 85, 100 ns
Ultra low standby current of 2碌A(chǔ) (max.)
Fully static operation
All inputs and outputs directly compatible
Three state outputs
Ultra low data retention current (V
CC
= 1.0V)
Operating voltage: 1.8V鈥?.3V
Packages
鈥?36-Ball CSP BGA (8mm x 10mm)
Functional Block Diagram
Input Buffer
I/O
8
I/O1
Column Decoder
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
A
18
Control
Circuit
OE
WE
CE1
CE2
Device Usage Chart
Operating
Temperature
Range
0擄C to 70 擄C
鈥?0擄C to +85擄C
Package
Outline
B
鈥?/div>
鈥?/div>
Access Time (ns)
85
鈥?/div>
鈥?/div>
100
鈥?/div>
鈥?/div>
L
鈥?/div>
Power
LL
鈥?/div>
鈥?/div>
Temperature
Mark
Blank
I
V62C1804096 Rev. 1.0 October 2001
1

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