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V58C265164S Datasheet

  • V58C265164S

  • 64 Mbit DDR SDRAM 2.5 VOLT 4M X 16

  • 44頁(yè)

  • MOSEL

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MOSEL VITELIC
V58C265164S
64 Mbit DDR SDRAM
2.5 VOLT 4M X 16
PRELIMINARY
4
System Frequency (f
CK
)
Clock Cycle Time (t
CK3
)
Clock Cycle Time (t
CK2.5
)
Clock Cycle Time (t
CK2
)
250 MHz
4 ns
4.8 ns
6 ns
45
225 MHz
4.5 ns
5.4 ns
6.75 ns
5
200 MHz
5 ns
6 ns
7.5 ns
55
183 MHz
5.5 ns
6.6 ns
8.25 ns
Features
I
4 banks x 1Mbit x 16 organization
I
High speed data transfer rates with system
frequency up to 250 MHz
I
Data Mask for Write Control (DM)
I
Four Banks controlled by BA0 & BA1
I
Programmable CAS Latency: 2, 2.5, 3
I
Programmable Wrap Sequence: Sequential
or Interleave
I
Programmable Burst Length:
2, 4, 8 for Sequential Type
2, 4, 8 for Interleave Type
I
Automatic and Controlled Precharge Command
I
Suspend Mode and Power Down Mode
I
Auto Refresh and Self Refresh
I
Refresh Interval: 4096 cycles/64 ms
I
Available in 66-pin 400 mil TSOP-II
I
SSTL-2 Compatible I/Os
I
Double Data Rate (DDR)
I
Bidirectional Data Strobe (DQs) for input and
output data, active on both edges
I
On-Chip DLL aligns DQ and DQs transitions with
CLK transitions
I
Differential clock inputs CLK and CLK
I
Power supply 2.5V 鹵 0.2V
Description
The V58C265164S is a four bank DDR DRAM
organized as 4 banks x 1Mbit x 16. The
V58C265164S achieves high speed data transfer
rates by employing a chip architecture that
prefetches multiple bits and then synchronizes the
output data to a system clock
All of the control, address, circuits are synchro-
nized with the positive edge of an externally sup-
plied clock. I/O transactions are possible on both
edges of DQS.
Operating the four memory banks in an inter-
leaved fashion allows random access operation to
occur at a higher rate than is possible with standard
DRAMs. A sequential and gapless data rate is pos-
sible depending on burst length, CAS latency and
speed grade of the device.
Device Usage Chart
Operating
Temperature
Range
0擄C to 70擄C
Package Outline
JEDEC 66 TSOP II
鈥?/div>
CLK Cycle Time (ns)
-4
鈥?/div>
Power
-55
鈥?/div>
-45
鈥?/div>
-5
鈥?/div>
Std.
鈥?/div>
L
鈥?/div>
Temperature
Mark
Blank
V58C265164S Rev. 1.7 August 2001
1

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