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UT62L5128(I) Datasheet

  • UT62L5128(I)

  • ASYNCHRONOUS STATIC RAM- High Speed

  • 15頁

  • ETC

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餂?/div>
UTRON
Rev. 1.1
UT62L5128(I)
512K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
REVISION
Preliminary Rev. 0.5
Preliminary Rev. 0.6
Preliminary Rev. 0.7
DESCRIPTION
Original.
1. The symbols CE# and OE# and WE# are revised as. CE
and OE and
WE
.
2. Separate Industrial and Consumer SPEC.
3. Add access time 55ns range.
1. Add SOP and STSOP package
1. Revised 36-pin TFBGA package outline dimension錛?/div>
a銆?Rev. 0.7 : ball diameter=0.3mm
b銆?Rev. 0.8 : ball diameter=0.35mm
2. Revised DC ELECTRICAL CHARACTERISTICS錛?/div>
a銆?/div>
Revised V
IH
as 2.2V
DATE
Mar, 2001
Jun 21,2001
Dec 18,2001
Preliminary Rev. 0.8
Apr 30,2002
Rev. 1.0
Rev. 1.1
1. Revised Fast access time : 55/70/100ns
55ns (max.) for Vcc=3.0V~3.6V
70/100ns (max.) for Vcc=2.7V~3.6V
2.
Revised Output Disable to Output in High Z (
t
OHZ*
) : 30 35ns
1. Revised Operation surrent :
-Icc(max) 45/35/25mA 40/30/25mA
-Icc(Typ) 30/25/20mA 30/20/16mA
2. Revised Standby current : 20/3uA 20/2uA
3. Revised V
OH
(Typ) : NA 2.7V
4. Add V
IH
(max)=V
CC
+2.0V for pulse width less than 10ns.
V
IL
(min)=V
SS
-2.0V for pulse width less than 10ns.
5. Revised AC Table t
OHZ*
characteristics
6. Add order information for lead free product
Aug 30,2002
May 06,2003
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80052
1

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