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USBN9602 Datasheet

  • USBN9602

  • USBN9602 (Universal Serial Bus) Full Speed Function Controll...

  • 253.33KB

  • 45頁(yè)

  • NSC

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USBN9602 (Universal Serial Bus) Full Speed Function Controller With DMA Support
November 1998
USBN9602 (Universal Serial Bus)
Full Speed Function Controller With DMA Support
1.0 General Description
The USBN9602 is an integrated USB Node controller com-
patible with the USB Specification Versions 1.0 and 1.1.
Integrated onto a single IC are the required USB trans-
ceiver with a 3.3V Regulator, Media Access Controller,
USB endpoint (EP) FIFOs, a versatile 8-bit parallel inter-
face, MICROWIRE/PLUS鈩?Interface and a clock genera-
tor. A total of seven FIFO buffers support the different USB
messages: one bidirectional FIFO for the mandatory con-
trol endpoint EP0 and six FIFOs for an additional six unidi-
rectional Endpoint Pipes to support USB interrupt, bulk and
isochronous data transfers. The 8-bit parallel interface sup-
ports multiplexed and non-multiplexed style CPU
address/data buses. A programmable interrupt output
scheme allows device configuration for different interrupt
signaling requirements.
Block Diagram
CS
RD
WR
A0/ALE
D[7:0]/AD[7:0]
INTR
MODE[1:0]
RESET
Microcontroller Interface
Vcc
GND
Endpoint/Control FIFOs
Control
Status
48 MHz
Oscillator
XIN
XOUT
EP2
EP4
Endpoint0
EP6
RX
TX
Clock
Generator
CLKOUT
EP1
EP3
SIE
Media Access Controller
(MAC)
Physical Layer Interface
(PHY)
Clock
Recovery
USB Event
Detect
V3.3
Transceiver
EP5
VReg
AGND
D+
D-
Upstream Port
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
MICROWIRE/PLUS
鈩?/div>
and MICROWIRE
鈩?/div>
are trademarks of National Semiconductor Corporation.
漏
1998 National Semiconductor Corporation
www.national.com

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