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USART Datasheet

  • USART

  • Telecomm/Datacomm

  • 31頁

  • ETC

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Features
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Compatible with an Embedded ARM7TDMI
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Processor
Programmable Baud Rate Generator
Parity, Framing and Overrun Error Detection
Line Break Generation and Detection
Automatic Echo, Local Loopback and Remote Loopback Channel Modes
Multi-drop Mode: Address Detection and Generation
Interrupt Generation
Two Dedicated Peripheral Data Controller Channels Can be Easily Implemented
5-, 6-, 7-, 8- and 9-bit Character Length
Full Scan Testable (up to 98%)
Can be Directly Connected to the Atmel Implementation of the AMBA
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Peripheral Bus
(APB)
Description
The two-channel, full-duplex USART features parity, framing and overrun error detec-
tion. A baud rate generator provides the bit period clock named the Baud Rate Clock
to both the receiver and the transmitter. The USART can be programmed to operate in
three different test modes: automatic echo
,
local loopback and remote loopback
.
Two dedicated Peripheral Data Controller channels can be easily implemented. One is
dedicated to the receiver. The other is dedicated to the transmitter.
The generation of interrupts is controlled in the status register by asserting the corre-
sponding interrupt line.
The USART can be used with any 32-bit microcontroller core if the timing diagram
shown on page 8 is respected. When using an ARM7TDMI as the core, the Atmel
Bridge must be used to provide the correct bus interface to the peripheral.
32-bit
Embedded ASIC
Core Peripheral
USART
Rev. 1242E鈥?2/01
1

USART相關(guān)型號(hào)PDF文件下載

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  • 英文版
    Telecomm/Datacomm
    ETC
  • 英文版
    Telecomm/Datacomm
    ETC
  • 英文版
    Telecomm/Datacomm
    ETC

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