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USART2 Datasheet

  • USART2

  • Telecomm/Datacomm

  • 47頁

  • ETC

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Features
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Compatible with an Embedded ARM7TDMI
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Processor
Programmable Baud Rate Generator
Parity, Framing and Overrun Error Detection
Line Break Generation and Detection
Automatic Echo, Local Loopback and Remote Loopback Channel Modes
Multi-drop Mode: Address Detection and Generation
Interrupt Generation
5-, 6-, 7-, 8- and 9-bit Character Length
Protocol ISO7816 T = 0 and T = 1
Modem, Handshaking (Hardware) and RS485 Signals
Fully Scan Testable (up to 98%)
Two Dedicated Peripheral Data Controller Channels Can be Easily Implemented
Can be Directly Connected to the Atmel Implementation of the AMBA
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Peripheral Bus
(APB)
32-bit
Embedded ASIC
Core Peripheral
USART2
Description
The two-channel, full-duplex USART2 features parity, framing and overrun error
detection. A baud rate generator provides the bit period clock, named the Baud Rate
Clock, to both the receiver and the transmitter. The USART2 can be programmed to
operate in five different modes: normal, modem, handshaking, RS485, and ISO7816
(T = 0 and T = 1). In normal mode, three different test configurations are available:
automatic echo, local loopback, and remote loopback.
Two dedicated Peripheral Data Controller channels can be easily implemented. One
is dedicated to the receiver. The other is dedicated to the transmitter. They can be
connected to either the PDC or PDC2 block.
The generation of interrupts is controlled in the status register by asserting the corre-
sponding interrupt line.
The USART2 can be used with any 32-bit microcontroller core if the timing diagram
shown in Figure 5 on page 8 is respected. When using an ARM7TDMI as the core, the
Atmel Bridge must be used to provide the correct bus interface to the peripheral.
Rev. 1733C鈥揅ASIC03/02
1

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  • 英文版
    Telecomm/Datacomm
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