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UPG503B Datasheet

  • UPG503B

  • 9 GHz DIVIDE-BY-4 DYNAMIC PRESCALER

  • 4頁

  • NEC   NEC

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9 GHz DIVIDE-BY-4
DYNAMIC PRESCALER
FEATURES
鈥?/div>
鈥?/div>
鈥?/div>
WIDE OPERATING FREQUENCY RANGE:
f
IN
= 3.5 to 9.0 GHz (T
A
= 25擄C)
DIVISION RATIO OF 4
GUARANTEED OPERATING TEMPERATURE RANGE:
-25擄C to +75擄C
Input Power, P
IN
(dBm)
+10
UPG503B
INPUT POWER vs. INPUT FREQUENCY
V
DD
= 3.8V
V
SS1
= 0V
V
SS2
= - 2.2 V
(V
GG1,2
OPEN)
T
A
= -25藲C
to +75藲C
Recommended
Operating
Region
0
DESCRIPTION
The UPG503B is a GaAs divide-by-4 prescaler that is capable
of operating up to 9 GHz. It is designed to be used in the
frequency synthesizers of microwave communication sys-
tems and measurement equipment. The UPG503B is a
dynamic divider. It employs buffered FET logic (BFL). The
UPG503B is available in a hermetic 8-lead ceramic flat
package.
-10
T
A
= -25藲C
T
A
= +25藲C
T
A
= +75藲C
0
1
2
3
4
5
6
7
8
9
10
Input Frequency, f (GHz)
ELECTRICAL CHARACTERISTICS
1
(T
A
= 25擄C, V
DD
= 3.8 V, V
SS1
= 0 V, V
SS2
= -2.2 V)
UPG503B
BF08
UNITS
mA
mA
mA
GHz
GHz
dBm
dBm
dBm
dBm
擄C/W
9.0
3.0
0
0
21
8.6
MIN
40
TYP
80
27
53
9.0
3.5
3.7
10.0
10.0
3
3
10
93
MAX
130
PART NUMBER
PACKAGE OUTLINE
SYMBOLS
I
DD
I
SS1
I
SS2
f
IN(U)
f
IN(L)
P
IN
P
OUT
R
TH
PARAMETERS AND CONDITIONS
Supply Current
Sink Current
2
I
SS1
= I
DD
- I
SS2
Sink Current
2
Upper Limit of Input Frequency, P
IN
= +9 to +10 dBm
Lower Limit of Input Frequency, P
IN
= +9 to +10 dBm
Input Power, f
IN
= 3.7 to 8.6 GHz
f
IN
= 5.0 to 7.4 GHz
Output Power, f
IN
= 8.6 GHz, P
IN
= +10 dBm
f
IN
= 3.7 GHz, P
IN
= +10 dBm
Thermal Resistance, Channel to Case
Note:
1.Device may exhibit low frequency spur typically below 150 Hz and -45 dBm.
2. Current is positive into the I
DD
pin and returns through the I
SS1
and I
SS2
pins.
California Eastern Laboratories

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