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UPD703038Y Datasheet

  • UPD703038Y

  • UPD703038.703038Y.703039.703039Y.703040.703040Y.703041.70304...

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DATA SHEET
碌
PD703038, 703038Y, 703039, 703039Y, 703040, 703040Y,
703041, 703041Y
V850/SV1
TM
32-BIT SINGLE-CHIP MICROCONTROLLERS
MOS INTEGRATED CIRCUIT
DESCRIPTION
The
碌
PD703038, 703038Y, 703039, 703039Y, 703040, 703040Y, 703041, and 703041Y (collectively known as
the V850/SV1) are products in the low-power series of V850 Family
microcontrollers for real-time control.
The V850/SV1 employs the CPU core of the V850 Family, and has on-chip peripheral functions such as large
capacity ROM/RAM, a multi-function timer/counter, serial interface, A/D converter, DMA controller, PWM, and a
Vsync/Hsync separation circuit.
The V850/SV1 not only realizes the low power consumption necessary for applications such as camcorders, but
also has an extremely high cost performance.
Detailed function descriptions are provided in the following user鈥檚 manuals. Be sure to read them before
designing.
V850/SV1 User鈥檚 Manual Hardware:
U14462E
V850 Family User鈥檚 Manual Architecture: U10243E
FEATURES
Number of instructions: 74
Minimum instruction execution time:
50 ns (@ 20 MHz operation with main system clock)
General-purpose registers: 32 bits
脳
32 registers
Instruction set (signed multiplication, saturation
operations, 32-bit shift instructions, bit manipulation
instructions, load/store instructions)
Memory space:
16 MB linear address space
Memory block allocation function: 2 MB per block
External bus: 16-bit multiplexed bus
Internal memory:
碌
PD703038, 703038Y
(ROM: 384 KB, RAM: 16 KB)
碌
PD703039, 703039Y
(ROM: 256 KB, RAM: 8 KB)
碌
PD703040, 703040Y
(ROM: 256 KB, RAM: 16 KB)
碌
PD703041, 703041Y
(ROM: 192 KB, RAM: 8 KB)
I/O lines Total: 151
10-bit resolution A/D converter: 16 channels
Timer/counter
24-bit: 2 channels, 16-bit: 2 channels
8-bit: 8 channels
Watch timer: 1 channel
Watchdog timer: 1 channel
DMA controller: 6 channels
Interrupts and exceptions
Non-maskable interrupts: 2 sources
Maskable interrupts:
碌
PD703038, 703039, 703040, 703041 (51 sources)
碌
PD703038Y, 703039Y, 703040Y, 703041Y (52
sources)
Software exceptions: 32 sources
Exception trap: 1 source
Serial interface (SIO)
Asynchronous serial interface (UART)
Clocked serial interface (CSI)
3-wire variable-length serial interface (CSI4)
2
2
I C bus interface (I C) (
碌
PD703039Y, 703040Y,
703041Y)
RTP: 8 bits
脳
2 channels or 4 bits
脳
4 channels
TM
products, which are NEC鈥檚 single-chip
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U13953EJ2V0DS00 (2nd edition)
Date Published July 2001 N CP(K)
Printed in Japan
The mark
shows major revised points.
漏
2000

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