S
YSTEM
-
ON
-C
HIP
L
ITE
System-on-Chip
Product Letter
Description
Gate Array with
ARM7TDMI
廬
subsystem
System-on-Chip Lite (SoCLite) is NEC鈥檚 new approach to low- to mid-volume system-on-
chip projects. SoCLite is based on standard ASIC technology and consists of two blocks:
an ARM7TDMI
廬
based subsystem and a sea-of-gates area. The ARM
廬
subsystem is fully
designed and verified as a supermacro. It frees the user from the task of developing a
complete RISC computer system. The sea-of-gates area allows the user to implement
custom logic or special peripheral functions.
SoCLite is designed for embedded control applications. To maintain flexibility, SoCLite is not
realized as an ASSP (application-specific standard product); this means that it can be used
for a wide range of different applications. Once the customer functions are implemented into
the sea-of-gates, it becomes a custom SoC. The SoCLite concept is especially interesting
for the industrial and telecommunication market. Target applications are factory automation,
industrial bus systems, card readers, business phones, terminals and home communication.
Because of its low unit cost, low NRE cost and short prototyping turnaround times, SoCLite
is also an ideal solution for emerging applications with uncertain market acceptance.
ARM7TDMI
廬
core
32-bit ARM
廬
and 16-bit Thumb
廬
instruction set
32-bit x 8-bit Multiplier
RAM: 8 Kbytes
Bootstrap ROM: 2 Kbytes
Memory controller supporting: Flash, SRAM
and ROM
鈥?Programmable interrupt controller:
32 interrupts, 8 priority levels
Applications
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?Peripherals: UART, timer, reset,
watchdog, PLL, oscillator
鈥?JTAG test and debug interface
鈥?Sea-of-gates: up to 190K raw gates
available for User Defined Logic
鈥?APB interconnection to the UDL
鈥?Operating frequency: 35 MHz
鈥?Operating voltage: 3.3 V + 0.3 V
鈥?Temperature range: -40 to +85擄C
鈥?256-pin PBGA package
Block Diagram
JTAG
ARM7TDMI
External Memory
廬
IRQ
FIRQ
Memory Bus Interface
AHB-IF
Arbiter
TIC
Memory
Controller
GNT/REQ
SELECT
AHB
User
Defined
Logic
AHB Wrapper
Internal
RAM/ROM
AHB to ABP
Bridge
Re-Map
System
Decoder
APB
Interrupt
Controller
UART
Timer
Reset
Watchdog
OSC
PLL
Clk Generator
S y s t e m @ I C
Solutions on a Chip
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