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UPD431632LGF-A7 Datasheet

  • UPD431632LGF-A7

  • x32 Fast Synchronous SRAM

  • 24頁

  • ETC

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DATA SHEET
MOS INTEGRATED CIRCUIT
碌
PD431632L
1M-BIT CMOS SYNCHRONOUS FAST SRAM
32K-WORD BY 32-BIT
PIPELINED OPERATION
Description
The
碌
PD431632L is a 32,768-word by 32-bit synchronous static RAM fabricated with advanced CMOS technology
using N-channel four-transistor memory cell.
The
碌
PD431632L integrates unique synchronous peripheral circuitry, 2-bit burst counter and output buffer as well as
SRAM core. All input registers are controlled by a positive edge of the single clock input (CLK).
The
碌
PD431632L is suitable for applications which require synchronous operation, high speed, low voltage, high
density and wide bit configuration, such as cache and buffer memory.
ZZ has to be set LOW at the normal operation. When ZZ is set HIGH, the SRAM enters Power Down State (鈥淪leep鈥?.
In the 鈥淪leep鈥?state, the SRAM internal state is preserved. When ZZ is set LOW again, the SRAM resumes normal
operation.
The
碌
PD431632LGF is packaged in 100-pin plastic LQFP with a 1.4 mm package thickness high density and low
capacitive loading.
Features
鈥?/div>
3.3 V (Chip) / 3.3 V or 2.5 V (I/O) Supply
鈥?/div>
Synchronous Operation
鈥?/div>
Internally self-timed Write control
鈥?/div>
Burst Read / Write: Interleaved Burst and Linear Burst Sequence
鈥?/div>
Fully Registered Inputs and Outputs for Pipelined operation
鈥?/div>
All Registers triggered off Positive Clock Edge
鈥?/div>
鈥?/div>
Single-Cycle deselect timing
鈥?/div>
3.3 V or 2.5 V LVTTL Compatible : All Inputs and Outputs
鈥?/div>
Fast Clock Access Time: 4.6 ns (150 MHz), 5 ns (133 MHz)
鈥?/div>
Asynchronous Output Enable: /G
鈥?/div>
Burst Sequence Selectable: MODE
鈥?/div>
Sleep Mode: ZZ (ZZ = Open or Low : Normal Operation )
鈥?/div>
Separate Byte Write Enable: /BW1 - /BW4, /BWE
Global Write Enable: /GW
鈥?/div>
Three Chip Enables for Easy Depth Expansion
鈥?/div>
Common I/O Using Three State Outputs
Ordering Information
Part number
Access Time Clock frequency
4.6 ns
5.0 ns
150 MHz
133 MHz
Package
100-PIN PLASTIC LQFP (14 x 20)
100-PIN PLASTIC LQFP (14 x 20)
碌
PD431632LGF-A6
碌
PD431632LGF-A7
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M11347EJ6V0DS00 (6th edition)
Date Published December 1999 NS CP(K)
Printed in Japan
The mark
鈥?/div>
shows major revised points.
漏
1996

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