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UPD30500AS2-266 Datasheet

  • UPD30500AS2-266

  • MICROPROCESSOR|64-BIT|CMOS|BGA|272PIN|PLASTIC

  • 32頁

  • ETC

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DATA SHEET
碌
PD30500, 30500A
V
R
5000
TM
, V
R
5000A
TM
64-/32-BIT MICROPROCESSOR
MOS INTEGRATED CIRCUIT
DESCRIPTION
The
碌
PD30500 (V
R
5000) and
碌
PD30500A (V
R
5000A) are a high-performance, 64-/32-bit RISC
Inc.
The instructions of the V
R
5000 and V
R
5000A are compatible with those of the V
R
3000
TM
Series and V
R
4000
TM
Series and higher, and completely compatible with those of the V
R
10000
TM
. Therefore, present applications can be
used as they are.
Detailed function descriptions are provided in the following user鈥檚 manuals. Be sure to read
them before designing.
鈥?V
R
5000, V
R
5000A User鈥檚 Manual (U11761E)
(Reduced
Instruction Set Computer) type microprocessors employing the RISC architecture developed by MIPS
TM
Technologies,
FEATURES
鈥?Employs 64-bit MIPS-based RISC architecture
鈥?High-speed processing
鈥?2-way super scalar 5-stage pipeline
鈥?5.5 SPECint95, 5.5 SPECfp95, 278 MIPS (
碌
PD30500)
7.0 SPECint95, 7.0 SPECfp95, 376 MIPS (
碌
PD30500A)
鈥?High-speed translation buffer mechanism (TLB) (48 entries)
鈥?Address space
Physical: 36 bits, Virtual: 40 bits
鈥?Floating-point unit (FPU)
鈥?Sum-of-products operation instruction supported
鈥?Primary cache memory (instruction/data: 32 KB each)
鈥?Secondary cache controller
鈥?Maximum operating frequency Internal: 200 MHz (
碌
PD30500), 266 MHz (
碌
PD30500A)
External: 100 MHz
鈥?Selectable external/internal multiple rate from twice to eight times
鈥?Instruction set compatible with V
R
3000 and V
R
4000 Series and higher (conforms to MIPS I, II, III, and IV)
鈥?Supply voltage: 3.3 V
鹵5%
(
碌
PD30500)
Core: 2.4 V
鹵0.1
V (
碌
PD30500A, @ 100 to 235 MHz),
2.5 V
鹵5%
(
碌
PD30500A, @ 236 to 250 MHz),
2.6 V
鹵0.1
V (
碌
PD30500A, @ 251 to 266 MHz)
I/O:
3.3 V
鹵5%
(
碌
PD30500A)
Unless otherwise specified, the V
R
5000 (
碌
PD30500) is treated as the representative model throughout this
document.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. U12031EJ5V0DS00 (5th edition)
Date Published January 2001 N CP(K)
Printed in Japan
The mark
shows major revised points.
漏
1997, 1999

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