Low on-state resistance (total on-state resistance of upper and lower MOS FETs) R
鈩?/div>
(TYP.)
Low power consumption due to 3-phase full-wave PWM drive method
On-chip hole bias switch (linked with STB pin)
On-chip IND (FG) pulse switching function, 1-phase output or 3-phase composite output
START/STOP pin included, acting as a brake during STOP
Standby pins included, turning off internal circuit in standby
Low current consumption: I
DD
= 3 mA (Max.), I
DD (ST)
= 1
碌
A (Max.)
On-chip thermal shutdown circuit
On-chip current limiting circuit; reference voltage can be set externally
On-chip low voltage malfunction prevention circuit
On-chip reverse rotation prevention circuit
30-pin plastic shrink SOP (300 mil)
ORDERING INFORMATION
Part Number
Package
30-pin shrink SOP (0.8-mm pitch, 300 mil)
碌
PD16856GS
The information in this document is subject to change without notice.
Document No. S13447EJ1V0DS00 (1st edition)
Date Published April 1999 N CP(K)
Printed in Japan
漏
1999