NEC's 3 V DUAL
DOWNCONVERTER AND UPB1007K
PLL FREQUENCY SYNTHESIZER
FEATURES
鈥?INTEGRATED RF BLOCK:
LNA, RF & IF Downconverter + PLL frequency
synthesizer
鈥?STATE OF THE ART 25 GHz f
T
UHS0 BIPOLAR
PROCESS
鈥?DOUBLE-CONVERSION:
f
1stIF
= 61.380 MHz
f
2ndIF
= 4.092 MHz
鈥?ADJUSTABLE GAIN:
20 dB range MIN
鈥?FIXED DIVISION PRESCALER
鈥?LOW POWER CONSUMPTION:
25 mA @ 3 V
鈥?SMALL 36 PIN QFN PACKAGE
Flat lead style for better performance
鈥?TAPE AND REEL PACKAGING AVAILABLE
DESCRIPTION
NEC's UPB1007K is a Silicon RFIC designed for low cost GPS
receivers. The IC combines an LNA, followed by a double-
conversion RF/IF downconverter block and a PLL frequency
synthesizer on one chip. The device operates on a 3V supply
voltage and is housed in a small 36 pin QFN (Quad Flat No-
lead) package, resulting in low power consumption and re-
duced board space. The device is manufactured using the
state of the art UHS0 25 GHz f
T
silicon bipolar process.
NEC's stringent quality assurance and test procedures en-
sure the highest reliability and performance.
APPLICATIONS
鈥?LOW POWER HANDHELD GPS RECEIVER
鈥?IN-VEHICLE NAVIGATION SYSTEMS
鈥?PC/PDA+GPS INTEGRATION
ELECTRICAL CHARACTERISTICS
(T
A
= 25擄C, V
CC
= 3.0 V, unless otherwise specified)
SYMBOLS
I
CC
V
CC
PART NUMBER
PACKAGE OUTLINE
PARAMETERS AND CONDITIONS
Total Circuit Current, No Signals
Supply Voltage
UNITS
mA
V
2.7
MIN
UPB1007K
QFN-36
TYP
25
3.0
MAX
31
3.3
LNA (f
RFin
= 1575.42 MHz, Z
L
= Z
S
= 50
鈩?
Z
LNAin
RF Input Impedance of LNA
鈩?/div>
28 - j38
Z
LNAop
RF Output Impedance of LNA
鈩?/div>
85 - jx6
P
1dBLNA
1 dB Compression, Input matched
dBm
-22
PG
LNA
Power Gain LNA, Input matched, P
RFin
= -60 dBm
dB
14
15
NF
LNA
Noise Figure of LNA, Input matched
dB
2.8
Mixer (f
RFin
= 1575.42 MHz, f
1stLOin
= 1636.80 MHz, P
LO
= -10 dBm, f
1stIF
= 61.38 MHz, Z
L
= Z
S
= 50
鈩?/div>
)
Z
MIXin
RF Input Impedance of Mixer
鈩?/div>
31 -j103
P
1dBMIX
1 dB Compression (refer to input), Input matched
dBm
-25
PCG
MIX
Power Conversion Gain
dB
21
NF
MIX
Noise Figure of Mixer (SSB), Input matched
dB
9.5
A
LO-IF
LO Leakage to IF Pins, P
LO
= -10 dBm
dBm
-40
A
LO-RF
LO Leakage to RF Input Pins, P
LO
= -10 dBm
dBm
-48
Z
MIXout
RF Output Impedance of Mixer
+152 - j9
PLL
I
CPOH
PLL Charge Pump High Side Current @ V
CPout
= V
CC/
2
mA
1
I
CPOL
PLL Charge Pump Low Side Current @ V
CPout
= V
CC/
2
mA
-1
f
PD
Phase Comparison Frequency
MHz
8.184
IF Downconverter Block (f
1stIFin
= 61.38 MHz, f
2ndLOin
= 65.472 MHz, f
2ndIF
output = 4.092 MHz, Z
S
= 2k
鈩?/div>
, Z
L
= 2 k
鈩?/div>
)
NF
2ndMIX
Noise Figure of 2nd IF Mixer (SSB), (Z
S
= 50鈩?
dB
12
GV
2ndMIX
Voltage Gain of 2nd Mixer/Amplifier, P
1stIF
= -50 dBm
dB
47
V
GC
Gain Control Voltage (Voltage at maximum gain)
V
0.5
D
GC
Gain Control Range, P
1stIF
= -50 dBm
dB
20
(Voltage at maximum gain)
A
2ndLO1stIF
2nd LO Isolation to 1st IF Input Pins, V
AGC
= 0 V
dB
-70
A
2ndLO2ndIF
2nd LO Isolation to 2nd IF Output Pins, V
AGC
= 0 V
dB
-70
3.2
10
California Eastern Laboratories
UPB1007K 產品屬性
CEL
射頻接收器
RF IC's
QFN-36
1575.42 MHz
2.7 V to 3.3 V
SMD/SMT
20
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