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UCC2583D Datasheet

  • UCC2583D

  • Current-Mode SMPS Controller

  • 442.60KB

  • 10頁

  • ETC

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UCC1583
UCC2583
UCC3583
Switch Mode Secondary Side Post Regulator
FEATURES
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Precision Secondary Side Post
Regulation for Multiple Output Power
Supplies
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Useful for Both Single Ended and
Center Tapped Secondary Circuits
鈥?/div>
Ideal Replacement for Complex
Magnetic Amplifier Regulated Circuits
鈥?/div>
Leading Edge Modulation
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Does Not Require Gate Drive
Transformer
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High Frequency (>500kHz) Operation
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Applicable for Wide Range of Output
Voltages
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High Current Gate Driver (0.5A
Sink/1.5A Source)
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Average Current Limiting Loop
DESCRIPTION
The UCC3583 is a synchronizable secondary side post regulator for preci-
sion regulation of the auxiliary outputs of multiple output power supplies. It
contains a leading edge pulse width modulator, which generates the gate
drive signal for a FET power switch connected in series with the rectifying
diode. The turn-on of the power switch is delayed from the leading edge of
the secondary power pulse to regulate the output voltage. The UCC3583
contains a ramp generator slaved to the secondary power pulse, a voltage
error amplifier, a current error amplifier, a PWM comparator and associ-
ated logic, a gate driver, a precision reference, and protection circuitry.
The ramp discharge and termination of the gate drive signal are triggered
by the synchronization pulse, typically derived from the falling edge of the
transformer secondary voltage. The ramp starts charging again once its
low threshold is reached. The gate drive signal is turned on when the ramp
voltage exceeds the control voltage. This leading edge modulation tech-
nique prevents instability when the UCC3583 is used in peak current mode
primary controlled systems.
The controller operates from a floating power supply referenced to the out-
put voltage being controlled. It features an undervoltage lockout (UVLO)
circuit, a soft start circuit, and an averaging current limit amplifier. The cur-
rent limit can be programmed to be proportional to the output voltage, thus
achieving foldback operation to minimize the dissipation under short circuit
conditions.
(continued)
TYPICAL APPLICATION AND BLOCK DIAGRAM
Note: Pin connections shown for 14-pin packages.
UDG-96201-2
11/98
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UCC2583D 產(chǎn)品屬性

  • 50

  • 集成電路 (IC)

  • PMIC - 穩(wěn)壓器 - DC DC 切換控制器

  • -

  • 電流模式

  • 1

  • 500kHz

  • 100%

  • 8.9 V ~ 14 V

  • 無

  • 無

  • 無

  • 無

  • 無

  • 無

  • 無

  • 是

  • -40°C ~ 85°C

  • 14-SOIC（0.154"，3.90mm 寬）

  • 管件

  • 296-12392-5

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