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Low 50碌A(chǔ) Sleep Mode Current
DESCRIPTION
The UC3572 is a negative output flyback pulse width modulator which con-
verts a positive input voltage to a regulated negative output voltage. The
chip is optimized for use in a single inductor negative flyback switching
converter employing an external PMOS switch. The block diagram consists
of a precision reference, an error amplifier configured for voltage mode op-
eration, an oscillator, a PWM comparator with latching logic, and a 0.5A
peak gate driver. The UC3572 includes an undervoltage lockout circuit to
insure sufficient input supply voltage is present before any switching activ-
ity can occur, and a pulse-by-pulse current limit. Output current can be
sensed and limited to a user determined maximum value. The UVLO circuit
turns the chip off when the input voltage is below the UVLO threshold. In
addition, a sleep comparator interfaces to the UVLO circuit to turn the chip
off. This reduces the supply current to only 50碌A(chǔ), making the UC3572 ideal
for battery powered applications.
BLOCK DIAGRAM
UDG-94094-2
03/99