U430/431
Vishay Siliconix
Matched N-Channel Pairs
PRODUCT SUMMARY
Part Number
U430
U431
V
GS(off)
(V)
鈥? to 鈥?
鈥? to 鈥?
V
(BR)GSS
Min (V)
鈥?5
鈥?5
g
fs
Min (mS)
10
10
I
G
Typ (pA)
鈥?5
鈥?5
jV
GS1
鈥?V
GS2
j
Typ (mV)
25
25
FEATURES
D
D
D
D
D
D
Two-Chip Design
High Slew Rate
Low Offset/Drift Voltage
Low Gate Leakage: 15 pA
Low Noise
High CMRR: 75 dB
BENEFITS
D
D
D
D
D
D
Tight Differential Match vs. Current
Improved Op Amp Speed, Settling Time Accuracy
Minimum Input Error/Trimming Requirement
Insignificant Signal Loss/Error Voltage
High System Sensitivity
Minimum Error with Large Input Signals
APPLICATIONS
D
Wideband Differential Amps
D
High-Speed, Temp-Compensated,
Single-Ended Input Amps
D
High-Speed Comparators
D
Impedance Converters
DESCRIPTION
The U430/431 are matched JFET pairs assembled in a TO-78
package. These devices offer good power gain even at
frequencies beyond 250 MHz.
The TO-78 package is available with full military processing
(see Military Information).
For similar products, see the low-noise U/SST401 series, the
high-gain 2N5911/5912, and the low-leakage U421/423 data
sheets.
TO-78
S
1
1
7
S
2
G
1
2
6
G
2
3
D
1
4
Case
Top View
5
D
2
ABSOLUTE MAXIMUM RATINGS
Gate-Drain, Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 鈥?5 V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA
Lead Temperature (
1
/
16
鈥?from case for 10 sec.) . . . . . . . . . . . . . . . . . . 300
_C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 鈥?5 to 200_C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 鈥?5 to 150_C
Document Number: 70249
S-04031鈥擱ev. E, 04-Jun-01
Power Dissipation :
Per Side
a
. . . . . . . . . . . . . . . . . . . . . . . . 300 mW
Total
b
. . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW
Notes
a. Derate 2.4 mW/_C above 25_C
b. Derate 4 mW/_C above 25_C
www.vishay.com
8-1
1
2
3
4
5
6
