SYN155C Device
155-Mbit/s Synchronizer
Clock & Data Output
TXC-02302B
DATA SHEET
FEATURES
鈥?Transmits and receives at STS-3/STM-1 rates
鈥?Compatible with available optical components
鈥?Detects frame of incoming 155.52 Mbit/s signal,
converts it to a 19.44 MByte/s or a 38.88 Mnib/s
parallel signal, clock and frame on terminal side
鈥?Receives 19.44 MByte/s or 38.88 Mnib/s data
from terminal, converts to serial data on the line
side
鈥?Pseudo-ECL receive and transmit clock and data
ports
鈥?Provides loopback of clock and data in both
directions
鈥?Optionally performs scrambling/descrambling and
B1 parity calculations
鈥?Performance monitoring of the received signal
includes:
- Loss of Signal (LOS)
- Out of Frame (OOF)
- Loss of Frame (LOF)
- Receive Frame Error (RFE)
鈥?Compliant with ANSI and ITU-T (CCITT)
documents:
- ANSI T1.105-1991
- ITU-T (CCITT) G.708
鈥?Transmit and reference clock framing signal
inversion capability
DESCRIPTION
The SYN155C synchronizer device provides a complete
STS-3/STM-1 frame synchronization function in a single
low-power CMOS unit. The SYN155C performs the
frame synchronization algorithm defined in ANSI/ITU-T
(CCITT) publications on an incoming 155.52 Mbit/s sig-
nal, and outputs signal bytes or nibbles along with a byte/
nibble clock and frame indication signal. In the transmit
direction, bytes or nibbles from a SONET/SDH device are
accepted and sent out in serial to the fiber transmitter
with a separate transmit clock signal.
The SYN155C supports two frame synchronization
modes: a full tracking mode which finds frame and veri-
fies it on following frames; and a non-tracking mode
which finds frame but performs no verification.
The serial line side is designed to connect directly to the
fiber interface components using pseudo-ECL voltage
levels (ECL operating from +5 V to ground), thus avoiding
the need for ECL-to-TTL or ECL-to-CMOS level conver-
sion.
APPLICATIONS
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鈥?/div>
鈥?/div>
鈥?/div>
STS-3/STM-1 transmit/receive using optical input/output
Add/drop OC3 multiplexers
Optical SONET bus extender
Test and performance monitoring equipment
LINE SIDE
Receive
pseudo-ECL
data and clock
Transmit
pseudo-ECL
data and clock
+5 V
TERMINAL SIDE
Byte/Nibble parallel
data, clock and
frame I/O
155.52 MHz
pseudo-ECL transmit
reference clock
SYN155C
155-Mbit/s
Synchronizer
Loopback
Control
Mode
Control
LOS/OOF
LOF/RFE
Document Number
TXC-02302B-MB
Ed. 5, January 2000
Copyright
餂?/div>
2000 TranSwitch Corporation
TranSwitch and TXC are registered trademarks of TranSwitch Corporation
TranSwitch Corporation
鈥?/div>
3 Enterprise Drive
鈥?/div>
Shelton, Connecticut 06484
Tel: 203-929-8810
鈥?/div>
Fax: 203-926-9453
鈥?/div>
www.transwitch.com
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