TSL401
128
脳
1 LINEAR SENSOR ARRAY
SOES011 鈥?MARCH 1996
D
D
D
D
D
D
D
128
脳
1 Sensor-Element Organization
400 Dots-Per-Inch (DPI) Sensor Pitch
High Linearity and Uniformity
for 256 Gray-Scale (8-Bit) Applications
Output Referenced to Ground
Low Image Lag (0.5% Typical)
Operation to 2 MHz
Single 5-V Supply
(TOP VIEW)
SI
CLK
AO
V
DD
1
2
3
4
8
7
6
5
NC
GND
GND
NC
NC 鈥?No internal connection
description
The TSL401 linear sensor array consists of a 128
脳
1 array of photodiodes and associated charge amplifier
circuitry. The pixels measure 63.5
碌m
(H)
脳
50
碌m
(W) with 63.5-碌m center-to-center spacing and 13.5
碌m
between pixels. Operation is simplified by internal logic requiring only a serial input (SI) signal and a clock.
functional block diagram
Pixel 1
Integrator
Reset
Pixel
2
Pixel
3
Pixel
128
Analog
Bus
Output
Amplifier
Sample/
Output
3
6,7
AO
RL
(External
Load)
VDD
4
+
_
Switch Control Logic
Gain
Trim
Q3
Q128
Q1
Q2
CLK
SI
2
1
128-Bit Shift Register
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
漏
1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251鈥?443
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