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TSB41AB3-EP Datasheet

  • TSB41AB3-EP

  • IEEE 1394A-2000 THREE-PORT CABLE TRANSCEIVER/ARBITER

  • 52頁(yè)

  • TI

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TSB41AB3 EP
IEEE 1394a 2000 THREE PORT CABLE TRANSCEIVER/ARBITER
SGLS122B 鈭?JULY 2002 鈭?REVISED DECEMBER 2004
D
Controlled Baseline
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D
D
鈭?One Assembly/Test Site, One Fabrication
Site
Extended Temperature Performance of
鈭?0擄C to 85擄C
Enhanced Diminishing Manufacturing
Sources (DMS) Support
Enhanced Product Change Notification
Qualification Pedigree
鈥?/div>
Fully Supports Provisions of IEEE
1394-1995 Standard for High Performance
Serial Bus鈥?and the 1394a-2000
Supplement
Fully Interoperable With FireWire錚?and
i.LINK錚?Implementation of IEEE Std 1394
Fully Compliant With Open HCI
Requirements
Provides Three 1394a-2000 Fully-Compliant
Cable Ports at 100/200/400 Megabits Per
Second (Mbits/s)
Full 1394a-2000 Support Includes:
Connection Debounce, Arbitrated Short
Reset, Multispeed Concatenation,
Arbitration Acceleration, Fly-By
Concatenation, Port
Disable/Suspend/Resume
Extended Resume Signaling for
Compatibility With Legacy DV Devices
Ultralow Power Sleep Mode
Node Power Class Information Signaling
for System Power Management
Cable Power Presence Monitoring
D
Cable Ports Monitor Line Conditions for
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Active Connection to Remote Node
Power-Down Features to Conserve Energy
in Battery Powered Applications Include:
Automatic Device Power Down During
Suspend, Device Power-Down Terminal,
Link Interface Disable via LPS, and Inactive
Ports Powered Down
Data Interface to Link-Layer Controller
Through 2/4/8 Parallel Lines at 49.152 MHz
Interface to Link Layer Controller Supports
Low-Cost TI Bus-Holder Isolation and
Optional Annex J Electrical Isolation
Interoperable With Link-Layer Controllers
Using 3.3-V and 5-V Supplies
Interoperable With Other Physical Layers
(PHYs) Using 3.3-V and 5-V Supplies
Low Cost 24.576-MHz Crystal Provides
Transmit Receive Data at 100/200/400
Mbits/s, and Link-Layer Controller Clock at
49.152 MHz
Separate Cable Bias (TPBIAS) for Each Port
Single 3.3-V Supply Operation
Low-Cost High Performance 80-Pin TQFP
(PFP) Thermally Enhanced Package
Direct Drop-In Upgrade for
TSB41LV03APFP and TSB41LV03PFP
Software Device Reset (SWR)
Fail-Safe Circuitry Senses Sudden Loss of
Power to the Device and Disables the Ports
to Ensure That the TSB41AB3 Does Not
Load the TPBIAS of Any Connected Device
and Blocks Any Leakage From the Port
Back to Power Plane
The TSB41AB3 Has a 1394a Compliant
Common-Mode Noise Filter on the
Incoming Bias Detect Circuit to Filter Out
Cross-Talk Noise
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鈥?Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
D
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
鈥mplements technology covered by one or more patents of Apple Computer, Incorporated and SGS Thompson, Limited.
i.LINK is a trademark of Sony Corporation
FireWire is a trademark of Apple Computer, Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
錚?/div>
2004, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1

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