TR2.5 SERIES
SILICON TRIACS
l
l
l
l
l
Sensitive Gate Triacs
2.5 A RMS
Glass Passivated Wafer
400 V to 800 V Off-State Voltage
Max I
GT
of 5 mA (Quadrant 1)
MT1
MT2
G
1
2
3
TO-220 PACKAGE
(TOP VIEW)
Pin 2 is in electrical contact with the mounting base.
absolute maximum ratings
over operating case temperature (unless otherwise noted)
RATING
TR2.5-400-14
TR2.5-600-14
TR2.5-700-14
TR2.5-800-14
SYMBOL
VALUE
400
V
DRM
600
700
800
I
T(RMS)
I
TSM
I
TSM
I
GM
P
GM
P
G(AV)
T
C
T
stg
T
L
2.5
12
14
鹵0.2
1.3
0.3
-40 to +110
-40 to +125
230
A
A
A
A
W
W
擄C
擄C
擄C
V
UNIT
Repetitive peak off-state voltage (see Note 1)
Full-cycle RMS on-state current at (or below) 85擄C case temperature (see Note 2)
Peak on-state surge current full-sine-wave (see Note 3)
Peak on-state surge current half-sine-wave (see Note 4)
Peak gate current
Peak gate power dissipation at (or below) 85擄C case temperature (pulse width
攏
200
m
s)
Average gate power dissipation at (or below) 85擄C case temperature (see Note 5)
Operating case temperature range
Storage temperature range
Lead temperature 1.6 mm from case for 10 seconds
NOTES: 1. These values apply bidirectionally for any value of resistance between the gate and Main Terminal 1.
2. This value applies for 50-Hz full-sine-wave operation with resistive load. Above 85擄C derate linearly to 110擄C case temperature at
the rate of 100 mA/擄C.
3. This value applies for one 50-Hz full-sine-wave when the device is operating at (or below) the rated value of on-state current.
Surge may be repeated after the device has returned to original thermal equilibrium. During the surge, gate control may be lost.
4. This value applies for one 50-Hz half-sine-wave when the device is operating at (or below) the rated value of on-state current.
Surge may be repeated after the device has returned to original thermal equilibrium. During the surge, gate control may be lost.
5. This value applies for a maximum averaging time of 20 ms.
electrical characteristics at 25擄C case temperature (unless otherwise noted)
PARAMETER
I
DRM
Repetitive peak
off-state current
Peak gate trigger
current
V
D
= rated V
DRM
V
supply
= +12 V鈥?/div>
I
GTM
V
supply
= +12 V鈥?/div>
V
supply
= -12 V鈥?/div>
V
supply
= -12 V鈥?/div>
V
supply
= +12 V鈥?/div>
V
GTM
Peak gate trigger
voltage
V
supply
= +12 V鈥?/div>
V
supply
= -12 V鈥?/div>
V
supply
= -12 V鈥?/div>
鈥?All voltages are with respect to Main Terminal 1.
TEST CONDITIONS
I
G
= 0
R
L
= 10
W
R
L
= 10
W
R
L
= 10
W
R
L
= 10
W
R
L
= 10
W
R
L
= 10
W
R
L
= 10
W
R
L
= 10
W
T
C
= 110擄C
t
p(g)
> 20
m
s
t
p(g)
> 20
m
s
t
p(g)
> 20
m
s
t
p(g)
> 20
m
s
t
p(g)
> 20
m
s
t
p(g)
> 20
m
s
t
p(g)
> 20
m
s
t
p(g)
> 20
m
s
0.9
-1.2
-1.2
1.2
MIN
TYP
MAX
鹵1
5
-8
-10
25
2.5
-2.5
-2.5
V
mA
UNIT
mA
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