S E M I C O N D U C T O R, I N C .
Figure 1. TQ9303 Block Diagram
鈥?/div>
10-bit TTL-compatible interface
to Transmitter and Receiver
鈥?32-bit interface to the host
鈥?Fully synchronous operation
鈥?160-pin PQFP
2
The TQ9303 ENDEC (ENcoder/DECoder) implements 8b/10b encoding
and decoding, ordered set encoding and decoding, and parity checking
and generation as defined in the Fibre Channel Physical Signaling
Interface Standard (FC-PH). The ENDEC fully implements the FC-1 layer
of the Fibre Channel Standard. Implemented in a 0.8-micron CMOS
process, the ENDEC also performs 32-bit CRC checking and generation
as defined in the FC-2 layer of the Fibre Channel specification.
The TQ9303 ENDEC interfaces directly to TriQuint鈥檚 FC-0 layer Fibre Channel
Transmitter (Tx) and Receiver (Rx) chipsets at the speeds shown below:
FC Rate
FC-266
FC-531
FC-1063
Transmitter
GA9101
TQ9501
TQ9501
Receiver
GA9102
TQ9502
TQ9502
Data Rate (Mbaud)
194鈥?66
500鈥?25
1000鈥?250
Triquint鈥檚 Transmitter and Receiver devices are designed with TriQuint鈥檚
proprietary 0.7-micron GaAs process. The Tx and Rx interface directly to
copper-based electrical media or to a fiber-optic module. The Transmitter
performs parallel-to-serial conversion on the encoded data and generates
the internal high-speed clock for the serial output data stream. The Receiver
recovers the clock and data from the input serial stream, performs serial-
to-parallel conversion, and detects and aligns on the K28.5 character.
For additional information and latest specifications, see our website:
www.triquint.com
1
DATACOM
PRODUCTS