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TQ8025 Datasheet

  • TQ8025

  • 2.5 Gigabit/sec 16x16 Digital Crosspoint Switch

  • 221.55KB

  • 10頁

  • TRIQUINT

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T
R
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T
S E M I C O N D U C T O R, I N C .
TQ8025
32
DI脴鈥?5
(differential)
PECL/CML
Input
Buffers
16 x 16
Crosspoint
Switch Matrix
32
PRELIMINARY DATA SHEET
DO脴鈥?5
(differential)
PECL/CML
Output
Buffers
RESET鈥?/div>
LDMODE
CONFIG
16 x 4
Configuration
Latches
4-Bit Shift
Register
READY
2.5 Gigabit/sec
16x16 Digital
Crosspoint Switch
Features
鈥?16 PECL/CML fully differential
(back-terminated) outputs
鈥?>2.5 Gb/s data bandwidth
per channel
鈥?>40 Gb/s aggregate bandwidth
SWITCHING
PRODUCTS
ADD15
+5V
GND
ADD脴
4-Bit Shift
Register
LOAD
CLOCK
ADDREN
AUTOCONFIG
Address Generator
and Control
RADD脴
RADD1
TQ8025
The TQ8025 is a non-blocking 16 x 16 digital crosspoint switch capable of
data rates greater than 2.5 gigabits per second per port. With a fully
differential internal data path and PECL/CML I/O, the TQ8025 offers an
extremely high data rate with exceptional signal fidelity. The use of fully
differential logic results in low crosstalk, jitter, and signal skew. The
TQ8025 is ideally suited for digital video, data communications,
telecommunication switching, and cross-connect applications.
The non-blocking architecture uses 16 fully independent 16:1 multiplexers
which allow each output port to be independently programmed to any input
port. The TQ8025 offers two programming options: a flexible port-by-port
option, and a fast configuration option.
Using the fast configuration option, all 16 switch ports are programmed
within 80ns by serially loading four 16-bit input port selection words. Two
output pins (RADD0,1) are provided to drive an external RAM
(n x 4 x 16 bits) used to store the switch configuration. An Autoconfigure
option automatically transfers the new configurations into the switch core.
Autoconfiguration occurs after the last input selection word is clocked into
the programming registers.
Data integrity is maintained on all unchanged data paths for both the port-
by-port and fast configuration options.
鈥?Non-blocking architecture
鈥?80 ns configuration time
鈥?Autonomous control of external
RAM for configuration data
鈥?Low jitter and signal skew
鈥?/div>
鹵
100 ps delay match (one input
to all outputs)
鈥?Fully differential data path
鈥?132-pin MLC package with
heat spreader
Applications
鈥?SONET OC-48 data path
鈥?Double-speed Fibre Channel
鈥?Hubs and routers
鈥?High-definition video switching
鈥?Parallel processing
For additional information and latest specifications, see our website:
www.triquint.com
1

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