S E M I C O N D U C T O R, I N C .
Figure 1. Block Diagram
鈩?/div>
designs
鈥?28-pin J-lead surface-mount
package
SYSTEM TIMING
PRODUCTS
19
20
21
22
23
24
25
GND
Q3
Q4
VDD
Q5
Q6
GND
TriQuint鈥檚 TQ1090 is a configurable clock buffer which generates 11
outputs, operating over a wide range of frequencies from 33 MHz to
45MHz, 65 MHz to 90 MHz and 130 MHz to 180 MHz. The outputs are
available at 1x, 2x and 4x, or at
1
/
2
x, 1x and 2x, or at
1
/
4
x,
1
/
2
x and
1x the reference clock frequency, f
REF
.
When one of the Group A outputs (Q0鈥換4) is used as feedback to the PLL,
all Group A outputs will be at f
REF
, all Group B outputs (Q5鈥換8) will be at
2x f
REF
and all Group C outputs (Q9,Q10) will be at 4x f
REF
. When one of the
Group B outputs is used as feedback to the PLL, all Group A outputs will
be at
1
/
2
x f
REF
, all Group B outputs will be at f
REF
and all Group C outputs
will be at 2x f
REF
. When one of the Group C outputs is used as feedback to
the PLL, all Group A outputs will be at
1
/
4
x f
REF
, all Group B outputs will be
at
1
/
2
x f
REF
and all Group C outputs will be at f
REF
.
A very stable internal Phase-Locked Loop (PLL) provides low-jitter operation.
This completely self-contained PLL requires no external capacitors or
resistors. The PLL鈥檚 Voltage-Controlled Oscillator (VCO) has a frequency
range from 260 MHz to 360 MHz. By feeding back one of the output clocks
to FBIN, the PLL continuously maintains frequency and phase synchron-
ization between the reference clock (REFCLK) and each of the outputs.
For additional information and latest specifications, see our website:
www.triquint.com
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