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TPIC6B596 Datasheet

  • TPIC6B596

  • POWER LOGIC 8-BIT SHIFT REGISTER

  • 11頁

  • TI

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TPIC6B596
POWER LOGIC 8-BIT SHIFT REGISTER
SLIS095 鈥?MARCH 2000
D
D
D
D
D
D
D
D
Low r
DS(on)
. . . 5
鈩?/div>
Avalanche Energy . . . 30 mJ
Eight Power DMOS-Transistor Outputs of
150-mA Continuous Current
500-mA Typical Current-Limiting Capability
Output Clamp Voltage . . . 50 V
Enhanced Cascading for Multiple Stages
All Registers Cleared With Single Input
Low Power Consumption
DW OR N PACKAGE
(TOP VIEW)
description
The TPIC6B596 is a monolithic, high-voltage,
medium-current power 8-bit shift register
designed for use in systems that require relatively
high load power. The device contains a built-in
voltage clamp on the outputs for inductive
transient protection. Power driver applications
include relays, solenoids, and other medium-
current or high-voltage loads.
NC
V
CC
SER IN
DRAIN0
DRAIN1
DRAIN2
DRAIN3
SRCLR
G
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
NC
GND
SER OUT
DRAIN7
DRAIN6
DRAIN5
DRAIN4
SRCK
RCK
GND
NC 鈥?No internal connection
logic symbol
鈥?/div>
G
RCK
SRCLR
SRCK
9
12
8
13
R
EN3
C2
SRG8
C1
This device contains an 8-bit serial-in, parallel-out
4
3
DRAIN0
2
1D
SER IN
shift register that feeds an 8-bit D-type storage
5
register. Data transfers through both the shift and
DRAIN1
6
storage registers on the rising edge of the
DRAIN2
7
shift-register clock (SRCK) and the register clock
DRAIN3
(RCK), respectively. The storage register
14
DRAIN4
transfers data to the output buffer when shift-
15
DRAIN5
register clear (SRCLR) is high. When SRCLR is
16
low, all registers in the device are cleared. When
DRAIN6
17
output enable (G) is held high, all data in the
DRAIN7
2
18
output buffers is held low and all drain outputs are
SER OUT
off. When G is held low, data from the storage
register is transparent to the output buffers. When
鈥?This symbol is in accordance with ANSI/IEEE Std 91-1984
data in the output buffers is low, the DMOS-
and IEC Publication 617-12.
transistor outputs are off. When data is high, the
DMOS-transistor outputs have sink-current capability. The serial output (SER OUT) is clocked out of the device
on the falling edge of SRCK to provide additional hold time for cascaded applications. This will provide improved
performance for applications where clock signals may be skewed, devices are not located near one another,
or the system must tolerate electromagnetic interference.
Outputs are low-side, open-drain DMOS transistors with output ratings of 50 V and 150-mA continuous sink-
current capability. Each output provides a 500-mA typical current limit at T
C
= 25擄C. The current limit decreases
as the junction temperature increases for additional device protection.
The TPIC6B596 is characterized for operation over the operating case temperature range of 鈥?40擄C to 125擄C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
漏
2000, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1

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