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TMX320C6727ZDH Datasheet

  • TMX320C6727ZDH

  • Floating-Point Digital Signal Processors

  • 1138.25KB

  • 115頁

  • TI

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TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268C 鈥?MAY 2005 鈥?REVISED NOVEMBER 2005
1
1.1
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TMS320C6727, TMS320C6726, TMS320C6722 DSPs
Features
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Three Multichannel Audio Serial Ports
鈥?Transmit/Receive Clocks up to 50 MHz
鈥?Six Clock Zones and 16 Serial Data Pins
鈥?Supports TDM, I2S, and Similar Formats
鈥?DIT-Capable (McASP2)
Universal Host-Port Interface (UHPI)
鈥?32-Bit-Wide Data Bus for High Bandwidth
鈥?Muxed and Non-Muxed Address and Data
Two 10-MHz SPI Ports With 3-, 4-, and 5-Pin
Options
Two Inter-Integrated Circuit (I2C) Ports
Real-Time Interrupt Counter/Watchdog
Oscillator- and Software-Controlled PLL
Applications:
鈥?Professional Audio
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Mixers
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Effects Boxes
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Audio Synthesis
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Instrument/Amp Modeling
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Audio Conferencing
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Audio Broadcast
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Audio Encoder
鈥?Emerging Audio Applications
鈥?Biometrics
鈥?Medical
鈥?Industrial
Commercial or Extended Temperature
144-Pin, 0.5-mm, PowerPAD鈩?Thin Quad
Flatpack (TQFP) [RFP Suffix]
256-Terminal, 1.0-mm, 16x16 Array Plastic Ball
Grid Array (PBGA) [GDH and ZDH Suffixes]
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C672x: 32-/64-Bit 300-MHz Floating-Point DSPs
Upgrades to C67x+ CPU From C67x Family:
鈥?2X CPU Registers [64 General-Purpose]
鈥?New Audio-Specific Instructions
鈥?Compatible With the C67x CPU
Enhanced Memory System
鈥?256K-Byte Unified Program/Data RAM
鈥?384K-Byte Unified Program/Data ROM
鈥?Single-Cycle Data Access From CPU
鈥?Large Program Cache (32K Byte) Supports
RAM, ROM, and External Memory
External Memory Interface (EMIF) Supports
鈥?100-MHz SDRAM (16- or 32-Bit)
鈥?Asynchronous NOR Flash, SRAM (8-,16-, or
32-Bit)
鈥?NAND Flash (8- or 16-Bit)
Enhanced I/O System
鈥?High-Performance Crossbar Switch
鈥?Dedicated McASP DMA Bus
鈥?Deterministic I/O Performance
dMAX (Dual Data Movement Accelerator)
Supports:
鈥?16 Independent Channels
鈥?Concurrent Processing of Two Transfer
Requests
鈥?1-, 2-, and 3-Dimensional
Memory-to-Memory and
Memory-to-Peripheral Data Transfers
鈥?Circular Addressing Where the Size of a
Circular Buffer (FIFO) is not Limited to 2
n
鈥?Table-Based Multi-Tap Delay Read and
Write Transfers From/To a Circular Buffer
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this document.
PowerPAD, C67x, C6000, DSP/BIOS, XDS, TMS320 are trademarks of Texas Instruments.
Philips is a registered trademark of Koninklijki Philips Electronics N.V.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 漏 2005鈥?005, Texas Instruments Incorporated

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