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TMS470R1A128 Datasheet

  • TMS470R1A128

  • 16/32-Bit RISC Flash Microcontrollers

  • 45頁

  • TI

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TMS470R1A128
16/32-Bit RISC Flash Microcontrollers
SPNS098 鈥?JANUARY 2005
FEATURES
鈥?/div>
鈥?/div>
High-Performance Static CMOS Technology
TMS470R1x 16/32-Bit RISC Core
(ARM7TDMI鈩?
鈥?28-MHz System Clock (48-MHz Pipeline
Mode)
鈥?Independent 16/32-Bit Instruction Set
鈥?Open Architecture With Third-Party Support
鈥?Built-In Debug Module
鈥?Big-Endian Format Utilized
Integrated Memory
鈥?128K-Byte Program Flash
鈥?/div>
One Bank With Ten Contiguous Sectors
鈥?/div>
Internal State Machine for Programming
and Erase
鈥?8K-Byte Static RAM (SRAM)
Operating Features
鈥?Core Supply Voltage (V
CC
): 1.81 V鈥?.05 V
鈥?I/O Supply Voltage (V
CCIO
): 3.0 V鈥?.6 V
鈥?Low-Power Modes: STANDBY and HALT
鈥?Industrial Temperature Range
470+ System Module
鈥?32-Bit Address Space Decoding
鈥?Bus Supervision for Memory and
Peripherals
鈥?Analog Watchdog (AWD) Timer
鈥?Real-Time Interrupt (RTI)
鈥?System Integrity and Failure Detection
Zero-Pin Phase-Locked Loop (ZPLL)-Based
Clock Module With Prescaler
鈥?Multiply-by-4 or -8 Internal ZPLL Option
鈥?ZPLL Bypass Mode
Six Communication Interfaces:
鈥?Two Serial Peripheral Interfaces (SPIs)
鈥?/div>
255 Programmable Baud Rates
鈥?Two Serial Communications Interfaces
(SCIs)
鈥?/div>
2
24
Selectable Baud Rates
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Asynchronous/Isosynchronous Modes
鈥?Standard CAN Controller (SCC)
鈥?/div>
16-Mailbox Capacity
鈥?/div>
Fully Compliant with CAN Protocol,
Version 2.0B
鈥?Class II Serial Interface (C2SIa)
鈥?/div>
Two Selectable Data Rates
鈥?/div>
Normal Mode 10.4 Kbps and 4X Mode 41.6
Kbps
High-End Timer (HET)
鈥?16 Programmable I/O Channels:
鈥?/div>
14 High-Resolution Pins
鈥?/div>
2 Standard-Resolution Pins
鈥?High-Resolution Share Feature (XOR)
鈥?HET RAM (64-Instruction Capacity)
10-Bit Multi-Buffered ADC (MibADC)
16-Channel
鈥?64-Word FIFO Buffer
鈥?Single- or Continuous-Conversion Modes
鈥?1.55 碌s Minimum Sample and Conversion
Time
鈥?Calibration Mode and Self-Test Features
Eight External Interrupts
Flexible Interrupt Handling
11 Dedicated GIO Pins, 1 Input-Only GIO Pin,
and 38 Additional Peripheral I/Os
External Clock Prescale (ECP) Module
鈥?Programmable Low-Frequency External
Clock (CLK)
On-Chip Scan-Base Emulation Logic, IEEE
Standard 1149.1
(1)
(JTAG) Boundary-Scan
Logic
100-Pin Plastic Low-Profile Quad Flatpack (PZ
Suffix)
(1)
The test-access port is compatible with the IEEE Standard
1149.1-1990, IEEE Standard Test-Access Port and Boundary
Scan Architecture. Boundary scan is not supported on this
device.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ARM7TDMI is a trademark of Advanced RISC Machines (ARM) Limited.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 漏 2005, Texas Instruments Incorporated

TMS470R1A128相關型號PDF文件下載

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    9 X 64 DIGITAL STORAGE BUFFER (FIFO)
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    16,384 WORD BY 4 BIT DYNAMIC RAM
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    262,144-BIT DYNAMIC RANDOM-ACCESS MEMORIES
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    262,144-BIT DYNAMIC RANDOM-ACCESS MEMORIES
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    4194304-WORD BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORIES
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    4194304-WORD BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORIES
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    1048576-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORIES
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