鈥?/div>
A11
A10
A9
A8
A7
A6
V
SS
description
The and TMS465169 is a high-speed,
67 108 864-bit dynamic random-access memory
(DRAM) device organized as 4 194 304 words of
16 bits. The TMS465169P is similar DRAM but
includes a long refresh period and a self-refresh
option. Both employ state-of-the-art technology
for high performance, reliability, and low power at
low cost.
PIN NOMENCLATURE
A0 鈥?A12鈥?/div>
DQ0 鈥?DQ15
LCAS
UCAS
NC
OE
RAS
VCC
VSS
W
Address Inputs
Data In / Data Out
Lower Column-Address Strobe
Upper Column-Address Strobe
No Internal Connection
Output Enable
Row-Address Strobe
3.3-V Supply
Ground
Write Enable
鈥?A12 is NC for TMS465169 and TMS465169P.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
漏
1998, Texas Instruments Incorporated
POST OFFICE BOX 1443
鈥?/div>
HOUSTON, TEXAS 77251鈥?443
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