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TMS44100 Datasheet

  • TMS44100

  • 4194304-WORD BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORIES

  • 25頁

  • TI

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TMS44100, TMS44100P, TMS46100, TMS46100P
4194304-WORD BY 1-BIT
DYNAMIC RANDOM-ACCESS MEMORIES
SMHS561A 鈥?MARCH 1995 鈥?REVISED JUNE 1995
D
D
D
D
D
Organization . . . 4 194 304
脳
1
Single 5 V Power Supply, for TMS44100 / P
(鹵 10% Tolerance)
Single 3.3 V Power Supply, for TMS46100 / P
(鹵 10% Tolerance)
Low Power Dissipation ( TMS46100P only)
鈥?200-碌A(chǔ) CMOS Standby
鈥?200-碌A(chǔ) Self Refresh
鈥?300-碌A(chǔ) Extended-Refresh Battery
Backup
Performance Ranges:
ACCESS ACCESS ACCESS
READ
TIME
TIME
TIME OR WRITE
(tRAC) (tCAC)
(tAA)
CYCLE
(MAX)
(MAX)
(MAX)
(MIN)
60 ns
15 ns
30 ns
110 ns
70 ns
18 ns
35 ns
130 ns
80 ns
20 ns
40 ns
150 ns
DGA PACKAGE
( TOP VIEW )
DJ PACKAGE
( TOP VIEW )
D
W
RAS
NC
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
9
10
11
12
13
26
25
24
23
22
18
17
16
15
14
V
SS
Q
CAS
NC
A9
A8
A7
A6
A5
A4
D
W
RAS
NC
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
9
10
11
12
13
26
25
24
23
22
18
17
16
15
14
V
SS
Q
CAS
NC
A9
A8
A7
A6
A5
A4
D
D
D
D
D
D
Enhanced Page-Mode Operation for Faster
Memory Access
CAS-Before-RAS ( CBR) Refresh
Long Refresh Period
鈥?1024-Cycle Refresh in 16 ms
鈥?128 ms (Max) for Low-Power,
Self-Refresh Version ( TMS4x100P)
3-State Unlatched Output
Texas Instruments EPIC鈩?CMOS Process
Operating Free-Air Temperature Range
0擄C to 70擄C
A0 鈥?A10
CAS
D
NC
Q
RAS
W
VCC
VSS
Address Inputs
Column-Address Strobe
Data In
No Connection
Data Out
Row-Address Strobe
Write Enable
5-V or 3.3-V Supply
Ground
description
The TMS4x100 series are high-speed,
4 194 304-bit dynamic random-access memories,
organized as 4 194 304 words of one bit each. The
TMS4x100P series are high-speed, low-power,
self-refresh with extended-refresh, 4 194 304-bit
dynamic random-access memories, organized as
4 194 304 words of one bit each. Both series
employ state-of-the-art EPIC
鈩?/div>
(Enhanced
Performance Implanted CMOS) technology for
high performance, reliability, and low voltage.
SELF-REFRESH
BATTERY
BACKUP
鈥?/div>
YES
鈥?/div>
YES
DEVICE
TMS44100
TMS44100P
TMS46100
TMS46100P
POWER
SUPPLY
5V
5V
3.3 V
3.3 V
REFRESH
CYCLES
1024 in 16 ms
1024 in 128 ms
1024 in 16 ms
1024 in 128 ms
These devices feature maximum RAS access times of 60 ns, 70 ns, and 80 ns. All addresses and data-in lines
are latched on chip to simplify system design. Data out is unlatched to allow greater system flexibility.
The TMS4x100 and TMS4x100P are offered in a 20- / 26-lead plastic surface-mount small-outline ( TSOP)
package (DGA suffix) and a 300-mil 20- / 26-lead plastic surface-mount SOJ package (DJ suffix). Both packages
are characterized for operation from 0擄C to 70擄C.
EPIC is a trademark of Texas Instruments Incorporated.
ADVANCE INFORMATION concerns new products in the sampling or
preproduction phase of development. Characteristic data and other
specifications are subject to change without notice.
Copyright
漏
1995, Texas Instruments Incorporated
POST OFFICE BOX 1443
鈥?/div>
HOUSTON, TEXAS 77251鈥?443
1
ADVANCE INFORMATION
鈥?x100/P-60
鈥?x100/P-70
鈥?x100/P-80
PIN NOMENCLATURE

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