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TMS427400P Datasheet

  • TMS427400P

  • 4194304-WORD BY 4-BIT HIGH-SPEED DRAMS

  • 30頁

  • TI

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TMS416400, TMS416400P, TMS417400, TMS417400P
TMS426400, TMS426400P, TMS427400, TMS427400P
4194304-WORD BY 4-BIT HIGH-SPEED DRAMS
SMKS881B 鈥?MAY 1995 鈥?REVISED AUGUST 1995
D
D
D
D
Electrical characteristics for TMS416400/P and
TMS417400/P is Production Data. Electrical
characteristics
for
TMS426400/P
and
TMS427400/P is Product Preview only.
Organization . . . 4 194304
脳
4
Single 5 V Power Supply for TMS41x400 / P
(鹵10% Tolerance)
Single 3.3 V Power Supply for
TMS42x400/ P (鹵 0.3 V Tolerance)
Performance Ranges:
ACCESS ACCESS ACCESS READ OR
TIME
TIME
TIME
WRITE
tRAC
tCAC
tAA
CYCLE
MAX
MAX
MAX
MIN
60 ns
15 ns
30 ns
110 ns
70 ns
18 ns
35 ns
130 ns
80 ns
20 ns
40 ns
150 ns
DJ PACKAGE
( TOP VIEW )
DGA PACKAGE
( TOP VIEW )
V
CC
DQ1
DQ2
W
RAS
A11
鈥?/div>
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
8
9
10
11
12
13
26
25
24
23
22
21
19
18
17
16
15
14
V
SS
DQ4
DQ3
CAS
OE
A9
A8
A7
A6
A5
A4
V
SS
V
CC
DQ1
DQ2
W
RAS
A11
鈥?/div>
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
8
9
10
11
12
13
26
25
24
23
22
21
19
18
17
16
15
14
V
SS
DQ4
DQ3
CAS
OE
A9
A8
A7
A6
A5
A4
V
SS
D
D
D
D
D
鈥?xx400/P-60
鈥?xx400/P-70
鈥?xx400/P-80
D
D
Enhanced Page-Mode Operation With
CAS-Before-RAS ( CBR) Refresh
Long Refresh Period and Self-Refresh
Option ( TMS4xx400P)
3-State Unlatched Output
Low Power Dissipation
High-Reliability Plastic 24 / 26-Lead
300-Mil-Wide Surface-Mount Small-Outline
J-Lead (SOJ) Package and 24 / 26-Lead
Surface-Mount Thin Small-Outline Package
( TSOP)
Operating Free-Air Temperature Range:
0擄C to 70擄C
EPIC
鈩?/div>
(Enhanced Performance Implanted
CMOS) Technology
PIN NOMENCLATURE
A0 鈥?A11鈥?/div>
CAS
DQ1 鈥?DQ4
OE
NC
RAS
VCC
VSS
W
Address Inputs
Column-Address Strobe
Data In / Data Out
Output Enable
No Internal Connection
Row-Address Strobe
5-V or 3.3-V Supply鈥?/div>
Ground
Write Enable
鈥?A11 is NC for TMS4x7400 / P.
鈥?See Available Options Table
description
The TMS4xx400 is a set of high-speed,
16 777 216-bit dynamic random-access memories
organized as 4 194 304 words of 4 bits each. The
TMS4xx400P series are high-speed, low-power,
self-refresh, 16 777 216-bit dynamic random-
access memories organized as 4 194 304 words of
4 bits each. The TMS4xx400 and TMS4xx400P
employ state-of-the-art EPIC鈩?(Enhanced
Performance Implanted CMOS) technology for
high performance, reliability, and low power.
DEVICE
AVAILABLE OPTIONS
POWER
SUPPLY
5V
5V
5V
5V
3.3 V
3.3 V
3.3 V
3.3 V
SELF
REFRESH
BATTERY
BACKUP
鈥?/div>
Yes
鈥?/div>
Yes
鈥?/div>
Yes
鈥?/div>
Yes
REFRESH
CYCLES
4096 in 64 ms
4096 in 128 ms
2048 in 32 ms
2048 in 128 ms
4096 in 64 ms
4096 in 128 ms
2048 in 32 ms
2048 in 128 ms
TMS416400
TMS416400P
TMS417400
TMS417400P
TMS426400
TMS426400P
TMS427400
TMS427400P
These devices feature maximum RAS access times of 60 ns, 70 ns, and 80 ns. All addresses and data-in lines
are latched on-chip to simplify system design. Data out is unlatched to allow greater system flexibility.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 1443
Copyright
漏
1995, Texas Instruments Incorporated
鈥?/div>
HOUSTON, TEXAS 77251鈥?443
1

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