This device is fabricated using LinCMOS鈩?/div>
technology and consists of two independent
voltage comparators, each designed to operate
from a single power supply. Operation from dual
supplies is also possible if the difference between
the two supplies is 2 V to 18 V. Each device
features extremely high input impedance
(typically greater than 10
12
鈩?,
allowing direct
interfacing with high-impedance sources. The
outputs are n-channel open-drain configurations
and can be connected to achieve positive-logic
wired-AND relationships.
NC 鈥?No internal connection
symbol (each comparator)
IN +
OUT
IN 鈥?/div>
The TLC372 has internal electrostatic discharge (ESD) protection circuits and has been classified with a 1000-V
ESD rating using human body model testing. However, care should be exercised in handling this device as
exposure to ESD may result in a degradation of the device parametric performance.
The TLC372C is characterized for operation from 0擄C to 70擄C. The TLC372I is characterized for operation from
鈥?40擄C to 85擄C. The TLC372M is characterized for operation over the full military temperature range of 鈥?55擄C
to 125擄C. The TLC372Q is characterized for operation from 鈥?40擄C to 125擄C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinCMOS is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
漏
1999, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
NC
GND
NC
2IN+
NC
Single or Dual-Supply Operation
Wide Range of Supply Voltages
2 V to 18 V
Very Low Supply Current Drain
150
碌A(chǔ)
Typ at 5 V
Fast Response Time . . . 200 ns Typ for
TTL-Level Input Step
Built-in ESD Protection
High Input Impedance . . . 10
12
鈩?/div>
Typ
Extremely Low Input Bias Current
5 pA Typ
Ultrastable Low Input Offset Voltage
Input Offset Voltage Change at Worst-Case
Input Conditions Typically 0.23
碌V/Month,
Including the First 30 Days
Common-Mode Input Voltage Range
Includes Ground
Output Compatible With TTL, MOS, and
CMOS
Pin-Compatible With LM393
TLC372C, TLC372I, TLC372M, TLC372Q
D, P, OR PW PACKAGE
TLC372M . . . JG PACKAGE
(TOP VIEW)
1OUT
1IN 鈥?/div>
1IN +
GND
1
2
3
4
8
7
6
5
V
CC
2OUT
2IN 鈥?/div>
2IN +
TLC372M . . . FK PACKAGE
(TOP VIEW)
NC
1IN 鈥?/div>
NC
1IN +
NC
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
NC
1OUT
NC
VDD
NC
NC
2OUT
NC
next
TLC372CP 產(chǎn)品屬性
50
集成電路 (IC)
線性 - 比較器
LinCMOS™
差分
2
CMOS,MOS,開路漏極,TTL
3 V ~ 16 V,±1.5 V ~ 8 V
5mV @ 5V
5pA @ 5V
20mA
400µA
-
-
-
0°C ~ 70°C
8-DIP(0.300",7.62mm)
通孔
管件
296-1845296-1845-5
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