Crystal Clock Oscillator
TCO-7116X1V
SMO-N-K VCXO
Features
CMOS logic output
Ceramic package
Space saving
Enable / Disable feature
Voltage controlled oscillator
Absolute Maximum Ratings
Parameter
Symbol
Supply voltage
V
cc
Input voltage
V
IN
Output voltage
V
O
Output current
I
O
Storage temperature
T
stg
T
sol
Soldering condition
T
Rating
-0.5 to +6.0 V
-0.5 to V
cc
+0.5 V
-0.5 to V
cc
+0.5 V
鹵10 mA
-55 to +125擄C
+260擄C / 20sec
or +230擄C / 180sec
Specifications
Parameter
Frequency
Frequency Stability
Pullability
Control Voltage Range
Operating Temperature
Supply Voltage
Supply Current
Input Voltage
Output Voltage
Symmetry
Rise/Fall time
Load Capacitance
Start-up time
Vcont
Topr
Vcc
Icc
V
IH
V
IL
V
OH
V
OL
TCO-7116X1V
fo
鈭唂/fo
Conditions
(*1)
(*2)
at Vcont=0.0 to +3.3V Ref=+1.65V
DC, Lead #1
1.5 to 55 MHz
鹵50 ppm max.
鹵100 ppm min.
+1.65 V 鹵1.65 V
0擄C to +70擄C
+3.3 V 鹵5 %
25 mA max.
V
IH
=70% Vcc min. / V
IL
=30% Vcc max.
V
OH
=90% Vcc min. / V
OL
=10% Vcc max.
40 to 60 %
10 ns max.
15 pF max.
5 ms max.
DC, Lead #6
Vcc=+3.46V
#2:V
IH
or OPEN ... Enable
#2:V
IL
or GND ... Disable
I
OH
=-0.8mA, I
OL
=+3.2mA, Lead #4
CMOS logic output at 50 % Vcc
CMOS logic output at 20 to 80% Vcc
CMOS logic output
(*3)
SYM
tr/tf
CL
t
st
*1 Please contact us for standard frequency.
*2 Inclusive of calibration tolerance at +25擄C, operating temperature, operating voltage range.
*3 Rise time (0 to +3.0V) of Vcc
>
150碌s
Package Outlines
[Dimensions in mm]
7.0
鹵0.2
Test Circuit
See Test Circuit page TEST-8
Footprint
[Dimensions in mm]
5.0
鹵0.2
Marking
#6
#5
1.8
#4
2.0
4.2
Cby
(1.4)
1.6
鹵0.2
#1
LEAD
#1
#2
#3
#4
#5
#6
CONNECTION
Control Voltage
E/D control
GND
OUTPUT
N.C.
Vcc
#2
#3
Cby=0.1碌F min.
#1
#2
#3
2.54 2.54
#6
#5
#4
(5.08)
(1.2)
(2003. 3.)
1
