TC55W800XB7,8
TENTATIVE
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
524,288-WORD BY 16-BIT FULL CMOS STATIC RAM
DESCRIPTION
The TC55W800XB is a 8,388,608-bit static random access memory (SRAM) organized as 524,288 words by 16 bits.
Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 2.3 to 3.3 V
power supply. Advanced circuit technology provides both high speed and low power at an operating current of 3
mA/MHz and a minimum cycle time of 70 ns. It is automatically placed in low-power mode at 0.5
碌A(chǔ)
standby
current (at V
DD
=
3 V, Ta
=
25擄C, maximum) when chip enable ( CE1 ) is asserted high or (CE2) is asserted low.
There are three control inputs. CE1 and CE2 are used to select the device and for data retention control, and
output enable ( OE ) provides fast memory access. Data byte control pin ( LB , UB ) provides lower and upper byte
access. This device is well suited to various microprocessor system applications where high speed, low power and
battery backup are required. And, with a guaranteed operating extreme temperature range of
鈭?0擄
to 85擄C, the
TC55W800XB can be used in environments exhibiting extreme temperature conditions. The TC55W800XB is
available in a plastic 48-ball BGA.
FEATURES
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Low-power dissipation
Operating: 9.9 mW/MHz (typical)
Single power supply voltage of 2.3 to 3.3 V
Power down features using CE1 and CE2
Data retention supply voltage of 1.5 to 3.3 V
Direct TTL compatibility for all inputs and outputs
Wide operating temperature range of
鈭?0擄
to 85擄C
Standby Current (maximum):
3.3 V
3.0 V
10
碌A(chǔ)
5
碌A(chǔ)
鈥?/div>
Access Times (maximum at V
DD
=
2.7 to 3.3 V):
TC55W800XB
7
Access Time
CE1
Access Time
8
85 ns
85 ns
85 ns
45 ns
70 ns
70 ns
70 ns
35 ns
CE2 Access Time
OE
Access Time
鈥?/div>
Package:
P-TFBGA48-0811-0.75AZ (Weight: 0.21 g typ)
PIN ASSIGNMENT
(TOP VIEW)
48 PIN BGA
1
A
B
LB
I/O9
2
OE
UB
PIN NAMES
3
A0
A3
A5
A17
NC
A14
A12
A9
4
A1
A4
A6
A7
A16
A15
A13
A10
5
A2
CE1
6
CE2
I/O1
I/O3
V
DD
V
SS
I/O7
I/O8
NC
A0~A18
CE1
, CE2
Address Inputs
Chip Enable
Read/Write Control
Output Enable
Data Byte Control
Data Inputs/Outputs
Power
Ground
No Connection
R/W
OE
C I/O10 I/O11
D
E
V
SS
V
DD
I/O12
I/O13
I/O2
I/O4
I/O5
I/O6
R/W
A11
LB ,
UB
I/O1~I/O16
V
DD
GND
NC
F I/O15 I/O14
G I/O16
H
A18
NC
A8
2001-10-03
1/12
TC55W800XB8相關(guān)型號PDF文件下載
-
型號
版本
描述
廠商
下載
-
英文版
1 μA Low Dropout Positive Voltage Regulator
-
英文版
IC,SRAM,1KX4,CMOS,DIP,18PIN,PLASTIC
Toshiba
-
英文版
2,048 WORD X 8 BIT CMOS STATIC RAM
TOSHIBA
-
英文版
2,048 WORD X 8 BIT CMOS STATIC RAM
TOSHIBA [T...
-
英文版
8,192 WORD X 8 BIT CMOS STATIC RAM
TOSHIBA
-
英文版
8,192 WORD X 8 BIT CMOS STATIC RAM
TOSHIBA [T...
-
英文版
65,536 bit static random access memory organized as 8,192 wo...
TOSHIBA
-
英文版
65,536 bit static random access memory organized as 8,192 wo...
TOSHIBA [T...
-
英文版
TC5588J_Toshiba.pdf
Toshiba
-
英文版
SILICON GATE CMOS 131,072 WORD x 8 BIT STATIC RAM
TOSHIBA
-
英文版
SILICON GATE CMOS 131,072 WORD x 8 BIT STATIC RAM
TOSHIBA [T...
-
英文版
2,048 WORD X 8 BIT CMOS STATIC RAM
TOSHIBA
-
英文版
2,048 WORD X 8 BIT CMOS STATIC RAM
TOSHIBA [T...
-
英文版
2,048 WORD X 8 BIT CMOS STATIC RAM
TOSHIBA
-
英文版
2,048 WORD X 8 BIT CMOS STATIC RAM
TOSHIBA [T...
-
英文版
32,768 WORD x 9 BIT CMOS STATIC RAM
TOSHIBA
-
英文版
32,768 WORD x 9 BIT CMOS STATIC RAM
TOSHIBA [T...
-
英文版
32,768 WORD x 9 BIT CMOS STATIC RAM
TOSHIBA
-
英文版
32,768 WORD x 9 BIT CMOS STATIC RAM
TOSHIBA [T...
-
英文版
524,228 WORDS x 8 BIT STATIC RAM
TOSHIBA
1
2
3
4
5
6
7
8
9
10
11
12
