TC55V040AFT-55,-70
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
524,288-WORD BY 8-BIT FULL CMOS STATIC RAM
DESCRIPTION
The TC55V040AFT is a 4,194,304-bit static random access memory (SRAM) organized as 524,288 words by 8 bits.
Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 2.3 to 3.6 V
power supply. Advanced circuit technology provides both high speed and low power at an operating current of 3
mA/MHz and a minimum cycle time of 55 ns. It is automatically placed in low-power mode at 0.5
碌A(chǔ)
standby
current (at V
DD
=
3 V, Ta
=
25擄C, maximum) when chip enable (
CE1
) is asserted high or (CE2) is asserted low.
There are three control inputs.
CE1
and CE2 are used to select the device and for data retention control, and
output enable (
OE
) provides fast memory access. This device is well suited to various microprocessor system
applications where high speed, low power and battery backup are required. And, with a guaranteed operating
extreme temperature range of
鈭?0擄
to 85擄C, the TC55V040AFT can be used in environments exhibiting extreme
temperature conditions. The TC55V040AFT is available in normal and reverse pinout plastic 40-pin
thin-small-outline package (TSOP).
FEATURES
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Low-power dissipation
Operating: 10.8 mW/MHz (typical)
Single power supply voltage of 2.3 to 3.6 V
Power down features using
CE1
and CE2
Data retention supply voltage of 1.5 to 3.6 V
Direct TTL compatibility for all inputs and outputs
Wide operating temperature range of
鈭?0擄
to 85擄C
Standby Current (maximum):
3.6 V
3.0 V
7
碌A(chǔ)
5
碌A(chǔ)
鈥?/div>
Access Times (maximum):
TC55V040AFT
-55
Access Time
CE1 Access Time
CE2 Access Time
OE Access Time
55 ns
55 ns
55 ns
30 ns
-70
70 ns
70 ns
70 ns
35 ns
鈥?/div>
Package:
TSOP鈪?0-P-1014-0.50 (AFT) (Weight: 0.32 g typ)
PIN ASSIGNMENT
(TOP VIEW)
40 PIN TSOP
1
40
PIN NAMES
A0~A18
Address Inputs
CE1 , CE2
R/W
OE
20
(Normal)
21
I/O1~I/O8
V
DD
GND
NC
Chip Enable
Read/Write Control
Output Enable
Data Inputs/Outputs
Power
Ground
No Connection
Pin No.
Pin Name
Pin No.
Pin Name
1
A16
21
A0
2
A15
22
CE1
3
A14
23
GND
4
A13
24
OE
5
A12
25
I/O1
6
A11
26
I/O2
7
A9
27
I/O3
8
A8
28
I/O4
9
R/W
29
NC
10
CE2
30
V
DD
11
NC
31
V
DD
12
NC
32
I/O5
13
A18
33
I/O6
14
A7
34
I/O7
15
A6
35
I/O8
16
A5
36
A10
17
A4
37
NC
18
A3
38
NC
19
A2
39
GND
20
A1
40
A17
2003-08-06
1/11
TC55V040AFT-70相關(guān)型號(hào)PDF文件下載
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