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Very High FEC performance :
Hamming and "BCH-t=2"
codes
Bitrate customisable :
7 to 25 Mbits/s
typical @ 5 iterations
Large block sizes :
up to 65 kbits
On-the-fly change of the code
Shortening facilities to adjust packet size and coding rate
Single-chip PLD IP Core : Altera APEX, no external memory required
Latency reduction by bank-swapping
Two selectable configuration interface
Bitrate/Complexity trade-off
bitrate @ 5iter.
25 Mbit/s
TC3014
TC3024
14 Mbit/s
TC3012
TC3022
7 Mbit/s
TC3011
TC3021
2k
5k
10k
parity and hamming product codes
parity, hamming and BCH t=2 product codes
20k Logic Elements
This document contains preliminary information. Information is subject to change without notice.
TC3000 is covered by several patents.
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